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首页> 外文期刊>Materials Science and Engineering. B, Solid-State Materials for Advanced Technology >Field-effect transistor based on nanometric thin CdS films
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Field-effect transistor based on nanometric thin CdS films

机译：基于纳米CdS薄膜的场效应晶体管

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摘要

Cadmium sulphide (CdS) thin films were deposited by chemical bath deposition (CBD) method on SiO_2/Si (n-type) substrates. Approximately, 70 nm thick nano-crystalline CdS layers were obtained. Thin film field effect transistors were realised by deposition of two coplanar electrodes of Au (drain and source) on the CdS surface. The gate contact is aluminium deposited on the backside of the Si substrate. The drain current-drain voltage characteristics (I_d - V_d) were performed in dark. Normal field effect transistor characteristics are obtained in case of positive gate and drain voltages, the device acting as an n-channel transistor in the accumulation mode. For negative drain voltages the characteristic is dominated by space charge limited currents (SCLC). An on/off current ratio of about 10~2 is reported, this being limited in our case by geometry.
机译：通过化学浴沉积（CBD）方法在SiO_2 / Si（n型）衬底上沉积硫化镉（CdS）薄膜。获得约70nm厚的纳米晶体CdS层。薄膜场效应晶体管是通过在CdS表面上沉积两个共面的Au电极（漏极和源极）来实现的。栅极触点是沉积在Si基板背面的铝。在黑暗中执行漏极电流-漏极电压特性（I_d-V_d）。在栅极和漏极为正电压的情况下，可获得正常的场效应晶体管特性，该器件在累积模式下充当n沟道晶体管。对于负漏极电压，该特性主要受空间电荷限制电流（SCLC）支配。据报道，开/关电流比约为10〜2，这在我们的情况下受到几何形状的限制。

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