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An a-factor architecture for RS decoder implemented on 90 nm CMOS technology for computer computing applications devices

机译：基于90 nm CMOS技术的RS解码器的a因数架构，用于计算机计算应用程序设备

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In Computing devices in the world wide, where number of computing and communication systems are increased rapidly. In the channel noise has greater impact on the messages or data transmitted through the wired/wireless network. The Reed Solomon (RS) decoder plays a vital role in removing the error from the received messages or data. The RS decoder has four main blocks, namely, Syndrome Computation (SC) block, Key Equation Solver (KES) block, Chien Search (CS) block and Forney Algorithm (FA) block. The researchers have thrown a number of works on each and every block of RS decoder. Moreover, the parallel and pipelined RS decoder shows a greater improvement in terms of gate element, latency, coding gain and throughput. Although this architecture has higher performance gain, the computation complexity in the SC block is not addressed. This paper presents an efficient architecture to compute the alpha-factor of SC blocks in RS decoder. The proposed RS decoder is developed using Verilog HDL (Hardware Description Language) and synthesized in Synopsys Design Compiler (DC). The proposed architecture is implemented in 90 nm CMOS technology and the results are evaluated in terms of gate count, clock rate, latency and throughput. The evaluated results of the proposed decoder show a remarkable improvement when compared with a conventional RS decoder. (C) 2019 Elsevier B.V. All rights reserved.
机译：在世界范围内的计算设备中，计算和通信系统的数量正在迅速增加。在信道中，噪声对通过有线/无线网络传输的消息或数据有更大的影响。 Reed Solomon（RS）解码器在从接收到的消息或数据中消除错误方面起着至关重要的作用。 RS解码器具有四个主要块，即，综合计算（SC）块，关键方程求解器（KES）块，Chien Search（CS）块和Forney算法（FA）块。研究人员在RS解码器的每个块上都投入了许多作品。而且，并行和流水线的RS解码器在门单元，等待时间，编码增益和吞吐量方面显示出更大的改进。尽管此体系结构具有更高的性能增益，但并未解决SC块中的计算复杂性。本文提出了一种有效的架构来计算RS解码器中SC块的alpha因子。拟议的RS解码器是使用Verilog HDL（硬件描述语言）开发的，并在Synopsys设计编译器（DC）中进行了合成。所提出的架构采用90 nm CMOS技术实现，并根据门数，时钟速率，等待时间和吞吐量评估了结果。与常规的RS解码器相比，所提出的解码器的评估结果显示出显着的改进。 （C）2019 Elsevier B.V.保留所有权利。

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