Accelerating End-to-End Deep Learning Workflow With Codesign of Data Preprocessing and Scheduling

Cheng Yang; Li Dan; Guo Zhiyuan; Jiang Binyao; Geng Jinkun; Bai Wei; Wu Jianping; Xiong Yongqiang

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Accelerating End-to-End Deep Learning Workflow With Codesign of Data Preprocessing and Scheduling

机译：加快数据预处理和调度的分号，加速端到端深度学习工作流程

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In this article, we investigate the performance bottleneck of existing deep learning (DL) systems and propose DLBooster to improve the running efficiency of deploying DL applications on GPU clusters. At its core, DLBooster leverages two-level optimizations to boost the end-to-end DL workflow. On the one hand, DLBooster selectively offloads some key decoding workloads to FPGAs to provide high-performance online data preprocessing services to the computing engine. On the other hand, DLBooster reorganizes the computational workloads of training neural networks with the backpropagation algorithm and schedules them according to their dependencies to improve the utilization of GPUs at runtime. Based on our experiments, we demonstrate that compared with baselines, DLBooster can improve the image processing throughput by 1.4x - 2.5x and reduce the processing latency by 1/3 in several real-world DL applications and datasets. Moreover, DLBooster consumes less than 1 CPU core to manage FPGA devices at runtime, which is at least 90 percent less than the baselines in some cases. DLBooster shows its potential to accelerate DL workflows in the cloud.

机译：在本文中，我们调查了现有深度学习（DL）系统的性能瓶颈，并提出了Dlbooster，以提高在GPU集群上部署DL应用的运行效率。在其核心，Dlbooster利用两级优化来提升端到端的DL工作流程。一方面，Dlbooster选择性地将一些关键解码工作负载卸载到FPGA，以向计算引擎提供高性能的在线数据预处理服务。另一方面，DLBooster通过BackProjagation算法重新组织培训神经网络的计算工作量，并根据其依赖来调度它们以改善运行时在运行时利用GPU。基于我们的实验，我们证明与基线相比，DLBooster可以将图像处理吞吐量提高1.4倍 - 2.5倍，并在几个真实的DL应用程序和数据集中减少1/3的处理延迟。此外，DLBooster消耗不到1个CPU核心来管理运行时的FPGA器件，在某些情况下，该运行时至少比基线小90％。 Dlbooster显示它可能加速云中的DL工作流程。

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来源
《IEEE Transactions on Parallel and Distributed Systems》 |2021年第7期|1802-1814|共13页
作者
Cheng Yang; Li Dan; Guo Zhiyuan; Jiang Binyao; Geng Jinkun; Bai Wei; Wu Jianping; Xiong Yongqiang;
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作者单位

Tsinghua Univ Beijing 100084 Peoples R China;

Tsinghua Univ Beijing 100084 Peoples R China;

Beihang Univ Beijing 100191 Peoples R China|Microsoft Res Beijing 100080 Peoples R China;

Microsoft Res Beijing 100080 Peoples R China|Shanghai Jiao Tong Univ Shanghai 200240 Peoples R China;

Tsinghua Univ Beijing 100084 Peoples R China;

Microsoft Res Beijing 100080 Peoples R China;

Tsinghua Univ Beijing 100084 Peoples R China;

Microsoft Res Beijing 100080 Peoples R China;

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正文语种 eng
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关键词
Data preprocessing; Training; Field programmable gate arrays; Task analysis; Graphics processing units; Artificial neural networks; Hardware; Deep learning; data preprocessing; workload offloading; computation scheduling; FPGAs;

机译：数据预处理;培训;现场可编程门阵列;任务分析;图形处理单元;人工神经网络;硬件;深度学习;数据预处理;工作负载卸载;计算调度;FPGA;

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Accelerating End-to-End Deep Learning Workflow With Codesign of Data Preprocessing and Scheduling

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