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首页> 外文期刊>Proceedings of the IEEE >Variability Mitigation in Nanometer CMOS Integrated Systems: A Survey of Techniques From Circuits to Software
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Variability Mitigation in Nanometer CMOS Integrated Systems: A Survey of Techniques From Circuits to Software

机译：纳米CMOS集成系统中的可变性缓解：从电路到软件的技术概览

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摘要

Variation in performance and power across manufactured parts and their operating conditions is an accepted reality in modern microelectronic manufacturing processes with geometries in nanometer scales. This article surveys challenges and opportunities in identifying variations, their effects and methods to combat these variations for improved microelectronic devices. We focus on computing devices and their design at various levels to combat variability. First, we provide a review of key concepts with particular emphasis on timing errors caused by various variability sources. We consider methods to predict and prevent, detect and correct, and finally conditions under which such errors can be accepted; we also consider their implications on cost, performance and quality. We provide a comparative evaluation of methods for deployment across various layers of the system from circuits, architecture, to application software. These can be combined in various ways to achieve specific goals related to observability and controllability of the variability effects, providing means to achieve cross-layer or hybrid resilience. We then provide examples of real world resilient single-core and parallel architectures. We find that parallel architectures and parallelism in general provide the best means to combat and exploit variability to design resilient and efficient systems. Using programmable accelerator architectures such as clustered processing elements and GP-GPUs, we show how system designers can coordinate propagation of timing error information and its effects along with new techniques for memoization (i.e., spatial or temporal reuse of computation). This discussion naturally leads to use of these techniques into emerging area of “approximate computing,” and how these can be used in building resilient and efficient computing systems. We conclude with an outlook for the emerging field.
机译：在具有纳米级几何形状的现代微电子制造工艺中，已制造零件之间性能和功率的变化是公认的现实。本文调查了在识别变化，变化的影响和方法以应对这些变化以改进微电子设备方面所面临的挑战和机遇。我们专注于各种级别的计算设备及其设计，以应对变化。首先，我们对关键概念进行了回顾，特别强调了由各种可变性源引起的时序误差。我们考虑了预测，预防，检测和纠正方法以及最终可以接受此类错误的条件；我们还考虑了它们对成本，性能和质量的影响。我们对从电路，体系结构到应用软件的跨系统各个层的部署方法进行了比较评估。这些可以以各种方式组合以实现与可变性效应的可观察性和可控制性相关的特定目标，从而提供实现跨层或混合弹性的手段。然后，我们提供现实世界中具有弹性的单核和并行架构的示例。我们发现，并行体系结构和并行性通常提供对抗和利用可变性来设计弹性高效系统的最佳方法。我们使用集群化处理元件和GP-GPU等可编程加速器体系结构，展示了系统设计人员如何协调时序误差信息的传播及其影响以及用于记忆的新技术（即计算的空间或时间重用）。讨论自然会导致将这些技术应用于“近似计算”的新兴领域，以及如何将其用于构建弹性高效的计算系统。最后，我们对新兴领域进行了展望。

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