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首页> 外文期刊>IEEE Journal of Solid-State Circuits >Circuit techniques for a 1.8-V-only NAND flash memory
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Circuit techniques for a 1.8-V-only NAND flash memory

机译：仅1.8V的NAND闪存的电路技术

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摘要

Focusing on internal high-voltage (Vpp) switching andngeneration for low-voltage NAND flash memories, this paper describes a Vn(pp) switch, row decoder, and charge-pump circuit. Thenproposed nMOS Vpp switch is composed of only intrinsicnhigh-voltage transistors without channel implantation, which realizesnboth reduction of the minimum operating voltage and elimination of the Vnpp leakage current. The proposed row decoder scheme isndescribed in which all blocks are in selected state in standby so as tonprevent standby current from flowing through the proposed Vppnswitches in the row decoder. A merged charge-pump scheme generates anplurality of voltage levels with an individually optimized efficiency,nwhich reduces circuit area in comparison with the conventional schementhat requires a separate charge-pump circuit for each voltage level. Thenproposed circuits were implemented on an experimental NAND flash memory.nThe charge pump and Vpp switch successfully operated at ansupply voltage of 1.8 V with a standby current of 10 ΜA. The proposednpump scheme reduced the area required for charge-pump circuits by 40%
机译：本文重点介绍低压NAND闪存的内部高压（Vpp）开关和生成，本文介绍了一种Vn（pp）开关，行解码器和电荷泵电路。然后提出的nMOS Vpp开关仅由本征高压晶体管组成，而没有沟道注入，从而实现了最小工作电压的降低和Vnpp漏电流的消除。描述了所提出的行解码器方案，其中所有块在待机状态下处于选定状态，从而可以防止待机电流流过行解码器中所提议的Vppn开关。合并的电荷泵方案以单独优化的效率生成多个电压电平，与传统方案相比，传统的方案需要每个电压电平单独的电荷泵电路，从而减少了电路面积。然后，在实验的NAND闪存上实现了拟议的电路。n电荷泵和Vpp开关成功地在1.8 V的电源电压下工作，待机电流为10 MA。拟议的npump方案将电荷泵电路所需的面积减少了40％

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