This paper presents the basis of the modeling of the MOS transistor for circuit simulation at RF. A physical equivalent circuit that can easily be implemented as a Spice subcircuit is first derived. The subcircuit includes a substrate network that accounts for the signal coupling occurring at HF from the drain to the source and the bulk. It is shown that the latter mainly affects the output admittance Y22. The bias and geometry dependence of the subcircuit components, leading to a scalable model, are then discussed with emphasis on the substrate resistances. Analytical expressions of the Y parameters are established and compared to measurements made on a 0.25-/spl mu/m CMOS process. The Y parameters and transit frequency simulated with this scalable model versus frequency, geometry, and bias are in good agreement with measured data. The nonquasi-static effects and their practical implementation in the Spice subcircuit are then briefly discussed. Finally, a new thermal noise model is introduced. The parameters used to characterize the noise at HF are then presented and the scalable model is favorably compared to measurements made on the same devices used for the S-parameter measurement.
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机译：本文介绍了用于RF电路仿真的MOS晶体管建模的基础。首先推导一个可以轻松实现为Spice子电路的物理等效电路。子电路包括一个基板网络，该基板网络负责在HF处发生的从漏极到源极和主体的信号耦合。结果表明，后者主要影响输出导纳Y22。然后讨论子电路组件的偏置和几何形状相关性，从而得出可扩展的模型，重点放在衬底电阻上。建立Y参数的分析表达式，并将其与在0.25- / spl mu / m CMOS工艺上进行的测量进行比较。使用此可扩展模型模拟的Y参数和过渡频率与频率，几何形状和偏差的关系与测量数据非常吻合。然后简要讨论了Spice子电路中的非准静态效应及其实际实现。最后，介绍了一种新的热噪声模型。然后介绍用于表征HF噪声的参数，并将可伸缩模型与在用于S参数测量的相同设备上进行的测量进行比较。
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