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首页> 外文期刊>Solid-State Electronics >Aluminum-induced iso-epitaxy of silicon for low-temperature fabrication of centimeter-large p~+n junctions
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Aluminum-induced iso-epitaxy of silicon for low-temperature fabrication of centimeter-large p~+n junctions

机译：铝诱导的硅等外延用于低温制造厘米大的p〜+ n结

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摘要

Aluminum-induced crystallization of Si is achieved on crystalline Si substrates in a manner that produces near-ideal p~+n diodes for centimeter large sizes. A layer-stack of physical-vapor-deposited materials, amorphous Si on aluminum, is inverted at an anneal temperature of 400 ℃ to form a monocrystalline p-doped Si layer by solid-phase epitaxy (SPE). The stages of the crystallization process are been reviewed here and studied with respect to the filling of the large-area SPE Si layers. It is shown that a complete iso-epitaxy coverage of large areas is possible if the starting c-Si substrate is free of nucleation centers. This can be achieved by appropriate wet-etching of the oxide to the Si followed by diluted HF dip-etching and Marangoni drying before deposition of the Al mediator layer and α-Si layer. Near-ideal p~+n diodes have been fabricated at× 400 ℃ with areas up to 1 × 1 cm~2, having ideality factors down to 1.02 and low leakage currents of a few nA/cm~2. From temperature-dependent measurements it can be concluded that the dominant origin of the leakage current is from ideal diffusion over the depletion regions and not from defect-related generation-recombination currents. The full coverage by p~+ SPE-Si is confirmed by material analysis.
机译：铝诱导的Si结晶是在晶体Si衬底上实现的，该方法可产生厘米级大尺寸的近乎理想的p〜+ n二极管。通过固相外延（SPE），在400℃的退火温度下，将物理气相沉积材料（铝上的非晶硅）的层堆叠反转，以形成单晶p掺杂硅层。此处回顾了结晶过程的各个阶段，并就大面积SPE Si层的填充进行了研究。结果表明，如果起始c-Si衬底没有成核中心，则大面积的完全等外延覆盖是可能的。这可以通过在铝介体层和α-Si层沉积之前对氧化物进行适当的湿法蚀刻至Si，然后进行稀释的HF浸蚀和Marangoni干燥来实现。近乎理想的p〜+ n二极管是在×400℃的条件下制造的，面积达1×1 cm〜2，理想因子低至1.02，漏电流低至几nA / cm〜2。从与温度有关的测量结果可以得出结论，泄漏电流的主要来源是耗尽区的理想扩散，而不是缺陷相关的产生重组电流。通过材料分析确定了p〜+ SPE-Si的完全覆盖。

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