An FPGA-based approach for speeding-up fault injection campaigns on safety-critical circuits

P. Civera; L. Macchiarulo; M. Rebaudengo; M. Sonza Reorda; M. Violante

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An FPGA-based approach for speeding-up fault injection campaigns on safety-critical circuits

机译：基于FPGA的方法可加快安全关键电路上的故障注入活动

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In this paper we describe an FPGA-based approach to speed-up fault injection campaigns for the evaluation of the fault-tolerance of VLSI circuits. Suitable techniques are proposed, allowing emulating the effects of faults and observing faulty behavior. The proposed approach combines the efficiency of hardware-based techniques, and the flexibility of simulation-based techniques. Experimental results are provided showing that significant speedup figures can be achieved with respect to state-of-the-art simulation-based fault injection techniques.

机译：在本文中，我们描述了一种基于FPGA的方法来加快故障注入活动，以评估VLSI电路的容错能力。提出了合适的技术，可以模拟故障的影响并观察故障行为。所提出的方法结合了基于硬件的技术的效率和基于仿真的技术的灵活性。提供的实验结果表明，相对于基于最新模拟的故障注入技术，可以实现显着的加速效果。

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《Journal of Electronic Testing: Theory and Applications: Theory and Applications》 |2002年第3期|共11页
作者
P. Civera; L. Macchiarulo; M. Rebaudengo; M. Sonza Reorda; M. Violante;
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原文格式 PDF
正文语种 eng
中图分类一般性问题;
关键词
Fault injection; FPGA-based fault emulation; Dependability evaluation; Fault tolerant circuits; Single event upset;

机译：故障注入;基于FPGA的故障仿真;可靠性评估;容错电路;单事件失败;

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1. An FPGA-based approach for speeding-up fault injection campaigns on safety-critical circuits [J] . P. Civera, L. Macchiarulo, M. Rebaudengo, Journal of Electronic Testing: Theory and Applications: Theory and Applications . 2002,第3期

机译：基于FPGA的方法可加快安全关键电路上的故障注入活动
2. Evaluating the Effectiveness of a Software-Based Technique Under SEEs Using FPGA-Based Fault Injection Approach [J] . M. Portela-Garcia, A. Lindoso, L. Entrena, Journal of Electronic Testing . 2012,第6期

机译：使用基于FPGA的故障注入方法评估SEE下基于软件的技术的有效性
3. System-on-chips Design Using ISCAS Benchmark Circuits - An Approach to Fault Injection and Simulation Based on Verilog HDL [J] . Sunil R. Das, Satyendra N. Biswas, Dhruv Biswas, IETE Journal of Research . 2012,第2期

机译：使用ISCAS基准电路的芯片系统设计-一种基于Verilog HDL的故障注入和仿真方法
4. Versatile and Efficient Techniques for Speeding-Up Circuit Level Simulated Fault-Injection Campaigns [C] . Sheng Weiguang, Xiao Liyi, Mao Zhigang Pacific Rim International Symposium on Dependable Computing . 2008

机译：用于加速电路级模拟故障注入运动的多功能和高效技术
5. Fault coverage analysis of integrated circuit designs through assertion-based verification and fault injection. [D] . Bingham, Scott Floyd. 2009

机译：通过基于断言的验证和故障注入对集成电路设计进行故障覆盖分析。
6. Fuzzy Inference System Approach for Locating Series Shunt and Simultaneous Series-Shunt Faults in Double Circuit Transmission Lines [O] . Aleena Swetapadma, Anamika Yadav 2015

机译：模糊推理系统方法在双回输电线路中串联并联和同时串联-并联故障的定位
7. Using SAT-solvers for deriving patch circuits that mask nodes faults and trojan circuits injections [O] . A.Yu. Matrosova 2020

机译：使用SAT-SOLVERS来导出掩模节点故障和木马电路注入的贴片电路

An FPGA-based approach for speeding-up fault injection campaigns on safety-critical circuits

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