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首页> 外文期刊>Journal of Low Power Electronics >Asynchronous Parallel Platforms with Balanced Performance and Energy
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Asynchronous Parallel Platforms with Balanced Performance and Energy

机译：具有性能和能量平衡的异步并行平台

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The landscape for digital integrated circuit design has changed from the one driven by performance to the one driven by energy or more-balanced design goals. Without the clock-related issues, asynchronous circuits enable further design tradeoffs and in-operation adaptive adjustments for energy efficiency. This paper presents a parallel homogeneous platform and a scalable heterogeneous platform implementing adaptive dynamic voltage scaling (DVS) based on the observation of system fullness and workload prediction. Datapath control logic with NULL cycle reduction and arbitration network is incorporated in the heterogeneous platform. The platforms have been integrated with the data processing units using the IBM 130 nm 8RF process. Results show that the adaptive DVS mechanism is effective in balancing the energy and performance in both platforms.
机译：数字集成电路设计的格局已经从以性能为主导的格局转变为以能量或更均衡的设计目标为主导的格局。在没有时钟相关问题的情况下，异步电路可实现进一步的设计折衷，并在运行中进行自适应调整以提高能效。本文提出了一个基于系统完整性和工作量预测的并行均质平台和可扩展异构平台，这些平台可实现自适应动态电压缩放（DVS）。异构平台中集成了具有NULL周期缩减和仲裁网络的数据路径控制逻辑。该平台已使用IBM 130 nm 8RF工艺与数据处理单元集成在一起。结果表明，自适应DVS机制可有效平衡两个平台的能量和性能。

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