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Rapid manufacturing of low-noise membranes for nanopore sensors by trans-chip illumination lithography

机译：通过跨芯片照明光刻技术快速制造用于纳米孔传感器的低噪声膜

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摘要

In recent years, the concept of nanopore sensing has matured from a proof-of-principle method to a widespread, versatile technique for the study of biomolecular properties and interactions. While traditional nanopore devices based on a nanopore in a single layer membrane supported on a silicon chip can be rapidly fabricated using standard microfabrication methods, chips with additional insulating layers beyond the membrane region can provide significantly lower noise levels, but at the expense of requiring more costly and time-consuming fabrication steps. Here we present a novel fabrication protocol that overcomes this issue by enabling rapid and reproducible manufacturing of low-noise membranes for nanopore experiments. The fabrication protocol, termed trans-chip illumination lithography, is based on illuminating a membrane-containing wafer from its backside such that a photoresist (applied on the wafers top side) is exposed exclusively in the membrane regions. Trans-chip illumination lithography permits the local modification of membrane regions and hence the fabrication of nanopore chips containing locally patterned insulating layers. This is achieved while maintaining a well-defined area containing a single thin membrane for nanopore drilling. The trans-chip illumination lithography method achieves this without relying on separate masks, thereby eliminating time-consuming alignment steps as well as the need for a mask aligner. Using the presented approach, we demonstrate rapid and reproducible fabrication of nanopore chips that contain small (12μm×12μm) free-standing silicon nitride membranes surrounded by insulating layers. The electrical noise characteristics of these nanopore chips are shown to be superior to those of simpler designs without insulating layers and comparable in quality to more complex designs that are more challenging to fabricate.
机译：近年来，纳米孔传感的概念已经从原理验证方法发展为一种广泛的，用于研究生物分子特性和相互作用的通用技术。尽管可以使用标准的微细加工方法快速制造基于纳米孔的传统纳米孔器件，该器件在硅芯片上支撑的单层膜中可以快速制造，但是在膜区域之外具有附加绝缘层的芯片可以提供更低的噪声水平，但以需要更多的噪声为代价昂贵且费时的制造步骤。在这里，我们提出了一种新颖的制造方案，该方案通过快速，可重复地制造用于纳米孔实验的低噪声膜来克服了这一问题。称为跨芯片照明光刻的制造协议是基于从其背面照亮含膜晶圆的，从而使光致抗蚀剂（施加在晶圆顶侧）仅在膜区域中曝光。跨芯片照明光刻技术可以对膜区域进行局部修饰，从而可以制造包含局部图案化绝缘层的纳米孔芯片。这是在保持定义明确的区域（包含用于纳米孔钻孔的单个薄膜）的同时实现的。跨芯片照明光刻方法无需依赖单独的掩模即可实现这一点，从而消除了耗时的对准步骤以及对掩模对准器的需求。使用提出的方法，我们演示了纳米孔芯片的快速且可重现的制造，该芯片包含由绝缘层围绕的小（12μm×12μm）的独立氮化硅膜。这些纳米孔芯片的电噪声特性显示出优于没有绝缘层的简单设计，并且其质量可与制造难度更大的更复杂的设计相媲美。

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