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首页> 外文期刊>Journal of Non-Crystalline Solids: A Journal Devoted to Oxide, Halide, Chalcogenide and Metallic Glasses, Amorphous Semiconductors, Non-Crystalline Films, Glass-Ceramics and Glassy Composites >A new experimental method to extract EEPROM tunnel oxide trap density from threshold voltage distributions
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A new experimental method to extract EEPROM tunnel oxide trap density from threshold voltage distributions

机译：从阈值电压分布中提取EEPROM隧道氧化物陷阱密度的新实验方法

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摘要

To ensure the reliability of EEPROM devices, it is significant to monitor the evolution of the memory array threshold voltage (V_T) distribution. In this work, impact of endurance and retention tests is evaluated on EEPROMs. Based on the extrinsic V_T population evolution, the oxide tunnel trap concentration (Nit) is extracted using a 700 kbits EEPROM test chip. Data retention after Write/Erase (W/E) cycles is one of the most important reliability issues in EEPROM devices. The electric high-field stress induced during W/E cycles is mainly responsible for the degradation of the retention time because it creates intrinsic failures or traps in the EEPROM tunnel oxide. These traps serve as bridges for the trap to trap conduction current (ITAT) in the tunnel oxide. EEPROM data retention degradation due to this stress-induced leakage current (SILC) impacts directly the EEPROM V_T distribution by creating extrinsic populations. To track accurately extrinsic cells' evolution (tail bits), representative of Nit parameter, an innovative experimental plan is proposed.
机译：为了确保EEPROM器件的可靠性，监视存储器阵列阈值电压（V_T）分布的变化非常重要。在这项工作中，评估了耐久性和保留测试对EEPROM的影响。根据外部V_T种群的演变，使用700 kbits EEPROM测试芯片提取氧化物隧道陷阱浓度（Nit）。写/擦除（W / E）周期后的数据保留是EEPROM器件中最重要的可靠性问题之一。在W / E周期中感应出的高电场应力主要是造成保留时间降低的原因，因为它在EEPROM隧道氧化物中产生了固有的故障或陷阱。这些陷阱用作陷阱的桥，以在隧道氧化物中捕获传导电流（ITAT）。由于这种应力引起的泄漏电流（SILC），导致EEPROM数据保留能力下降，这会通过产生外部填充而直接影响EEPROM V_T的分布。为了准确跟踪代表Nit参数的外在细胞的进化（尾位），提出了一种创新的实验计划。

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