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首页> 外文期刊>Journal of Non-Crystalline Solids: A Journal Devoted to Oxide, Halide, Chalcogenide and Metallic Glasses, Amorphous Semiconductors, Non-Crystalline Films, Glass-Ceramics and Glassy Composites >Effects of localized gate stack parasitic charge on current-voltage characteristics of double-gate MOSFETs with high-permittivity dielectrics and Ge-channel
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Effects of localized gate stack parasitic charge on current-voltage characteristics of double-gate MOSFETs with high-permittivity dielectrics and Ge-channel

机译：局部栅叠层寄生电荷对具有高介电常数和Ge通道的双栅MOSFET电流-电压特性的影响

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摘要

In this paper we investigate the effects of localized gate stack parasitic charges on the current-voltage characteristics of double-gate (DG) MOSFET with metal/high-permittivity/Ge-channel using two-dimensional (2-D) numerical simulation. For this purpose a simulation code is developed, solving the Poisson equation on the entire device coupled self-consistently with the drift-diffusion transport equation. We show that the charges trapped at grain boundaries in the high-permittivity (high-κ) layer induce 2-D potential fluctuations in the structure, not only in the high-κ layer, but also in the underlying oxide and semiconductor regions. These potential fluctuations are shown to significantly degrade the subthreshold behavior of the drain current. The off-state drain current and the subthreshold slope increase with respect to the case where no charge is present in the gate stack. The influence of the location of the charged grain boundaries in the stack on the subthreshold parameters is also investigated using the 2-D numerical simulation code.
机译：在本文中，我们使用二维（2-D）数值模拟研究了局部栅极叠层寄生电荷对具有金属/高介电常数/ Ge沟道的双栅极（DG）MOSFET的电流-电压特性的影响。为此目的，开发了仿真代码，将整个设备上的泊松方程与漂移扩散输运方程自洽耦合。我们表明，在高介电常数（高κ）层中的晶界处捕获的电荷不仅在高κ层中而且还在下面的氧化物和半导体区域中引起结构中的二维电势波动。这些潜在的波动表明会大大降低漏极电流的亚阈值性能。相对于栅极堆叠中不存在电荷的情况，截止态漏极电流和亚阈值斜率增加。还使用二维数值模拟代码研究了带电晶粒边界在堆栈中的位置对亚阈值参数的影响。

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