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首页> 外文期刊>Analog Integrated Circuits and Signal Processing >Feature extraction without learning in an analog spatial pooler memristive-CMOS circuit design of hierarchical temporal memory
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Feature extraction without learning in an analog spatial pooler memristive-CMOS circuit design of hierarchical temporal memory

机译:特征提取而不学习的模拟空间池存储器Memristive-CMOS电路设计的分层时间记忆

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摘要

Hierarchical temporal memory (HTM) is a neuromorphic algorithm that emulates sparsity, hierarchy and modularity resembling the working principles of neocortex. Feature encoding is an important step to create sparse binary patterns. This sparsity is introduced by the binary weights and random weight assignment in the initialization stage of the HTM. We propose the alternative deterministic method for the HTM initialization stage, which connects the HTM weights to the input data and preserves natural sparsity of the input information. Further, we introduce the hardware implementation of the deterministic approach and compare it to the traditional HTM and existing hardware implementation. We test the proposed approach on the face recognition problem and show that it outperforms the conventional HTM approach.
机译:分层时间记忆(HTM)是一种神经形态算法,其模拟了类似于Neocortex的工作原理的稀疏性,层次结构和模块化。 特征编码是创建稀疏二进制模式的重要步骤。 通过二进制权重和HTM的初始化阶段中的二进制权重和随机重量分配引入这种稀疏性。 我们提出了用于HTM初始化阶段的替代确定方法,其将HTM权重与输入数据连接并保留输入信息的自然稀疏性。 此外,我们介绍了确定性方法的硬件实现,并将其与传统的HTM和现有硬件实现进行比较。 我们在面部识别问题上测试所提出的方法,并表明它优于传统的HTM方法。

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