机译:卷积神经网络加速硬件/软件共同设计
Department of Electrical and Computer Engineering The University of Auckland;
Department of Electrical and Computer Engineering The University of Auckland;
Department of Electrical and Computer Engineering The University of Auckland;
School of Electrical Computer and Telecommunications Engineering University of Wollongong;
School of Electrical Computer and Telecommunications Engineering University of Wollongong;
Computer vision; Embedded system; Neural network; Co-design; Hardware acceleration; FPGA; Real-time; Gender recognition;
机译:卷积神经网络加速硬件/软件共同设计
机译:FPGA硬件/软件共同设计,可为机器人应用发展可扩展的脉冲神经网络
机译:粒子群优化算法训练神经网络的软/硬件协同设计
机译:Asbnn:通过算法 - 硬件共同设计加速贝叶斯卷积神经网络
机译:VHDL自动生成工具,用于在FPGA(VGT)上优化卷积神经网络的硬件加速
机译:一种新颖的硬件 - 软件协同设计和实现的猪算法
机译:硬件软件共同设计实时多任务衍射深神经网络