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首页> 外文期刊>Journal of Low Power Electronics >Secured Hardware Design with Locker-Box Against a Key-Guessing Attacks
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Secured Hardware Design with Locker-Box Against a Key-Guessing Attacks

机译：用储物箱固定硬件设计，反对致钥匙猜测攻击

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摘要

Intellectual Property threat is most challenging in the integrated chip manufacturing industry. Outsourcing the chip fabrication to untrusted foundries leads at the risk of intellectual property theft. Logical locking is the most popular countermeasure against the hardware intellectual property threats. In which the design is functionally locked with the added logic gates and thus the logically locked design is accessible only by applying the valid keys. This made the attacker to put all efforts to identify the valid key to unlock the integrated chip through various key-guessing attacks. Hence, an enhanced logical locking with locker-box is proposed to design a secured hardware. This lockerbox is a logical non-linear component, which produces an ambiguous relationship between inputs and outputs. This non-linear mathematical function build a strong hardware against key-guessing attacks. Furthermore, the gates at which the logical locking is implanted plays a vital role as the design overheads like area, power and delay are concerned for any design. In this work, the gates with low observability values are chosen, such that an incorrect key will give an output corruption of 50% as a Hamming distance with minimal design overhead and implementation complexity. The experimental results are validated on ISCAS'85, ISCAS'89 and ITC'99 benchmark circuits.
机译：知识产权威胁在集成芯片制造业中最具挑战性。将芯片制作外包给不可信任的铸造厂，导致知识产权盗用的风险。逻辑锁定是对硬件知识产权威胁最受欢迎的对策。其中设计在功能上锁定添加逻辑门，因此唯一通过应用有效键可访问逻辑上锁定的设计。这使得攻击者能够通过各种关键猜测攻击来识别识别有效键来解锁集成芯片的有效键。因此，提出了一种具有储物盒的增强逻辑锁定来设计安全硬件。此锁定箱是一个逻辑非线性组件，它在输入和输出之间产生模糊的关系。这种非线性数学函数构建了强大的硬件，免受猜测攻击攻击。此外，植入逻辑锁定的栅极扮演一个重要的作用，作为面积的设计开销，电力和延迟涉及任何设计。在这项工作中，选择具有低可观察性值的栅极，使得不正确的键将使输出损坏为50％，作为汉明距离，具有最小的设计开销和实现复杂性。实验结果在ISCAS'85，ISCAS'89和ITC'99基准电路上验证。

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