首页> 外文期刊>Nanotechnology >Integration of self-assembled carbon nanotube transistors: statistics and gate engineering at the wafer scale
【24h】

Integration of self-assembled carbon nanotube transistors: statistics and gate engineering at the wafer scale

机译:自组装碳纳米管晶体管的集成:晶圆级统计和栅极工程

获取原文
获取原文并翻译 | 示例
           

摘要

We present a full process based on chemical vapour deposition that allows fabrication and integration at the wafer scale of carbon-nanotube-based field effect transistors. We make a statistical analysis of the integration yield that allows assessment of the parameter fluctuations of the titanium-nanotube contact obtained by self-assembly. This procedure is applied to raw devices without post-process. Statistics at the wafer scale reveal the respective role of semiconducting and metallic connected nanotubes and show that connection yields up to 86 percent can be reached. For large scale device integration, our process has to implement both wafer-scale self-assembly of the nanotubes and high transistor performances. In order to address this last issue, a gate engineering process has been investigated. We present the improvements obtained using low and high K dielectrics for the gate oxide.
机译:我们提出了一种基于化学气相沉积的完整工艺,该工艺可以在基于碳纳米管的场效应晶体管的晶圆规模上进行制造和集成。我们对积分产率进行了统计分析,从而可以评估通过自组装获得的钛纳米管触点的参数波动。此过程适用于未经后处理的原始设备。晶圆级的统计数据揭示了半导体和金属连接的纳米管各自的作用,并表明可以达到高达86%的连接良率。对于大规模设备集成,我们的过程必须实现纳米管的晶圆级自组装和高晶体管性能。为了解决最后一个问题,已经对浇口工程过程进行了研究。我们介绍了使用低K和高K电介质作为栅极氧化物所获得的改进。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号