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Neuron peripheral circuits for neuromorphic synaptic memory array based on neuron models

机译:基于神经元模型的神经形态突触记忆阵列的神经元外围电路

摘要

A neuromorphic memory system including neuromorphic memory arrays. The neuromorphic memory system includes a presynaptic neuron circuit coupled to a postsynaptic neuron circuit by a resistive memory cell. The method includes generating a presynaptic LIF pulse on a presynaptic LIF line at time t1. An activating operation activates an access transistor coupled to the presynaptic LIF line in response to the presynaptic LIF pulse. The access transistor enables LIF current to pass through the resistive memory cell to a postsynaptic LIF line. An integrating operation integrates the LIF current at the postsynaptic LIF line over time. A comparing operation compares a LIF voltage at the postsynaptic LIF line to a threshold voltage. A generating operation generates a postsynaptic spike timing dependent plasticity (STDP) pulse on a postsynaptic STDP line if the LIF voltage is beyond the threshold voltage.
机译:一种神经形态存储系统,包括神经形态存储阵列。神经形态存储系统包括通过电阻性存储单元耦合到突触后神经元电路的突触前神经元电路。该方法包括在时间t 1 在突触前LIF线上产生突触前LIF脉冲。响应于突触前LIF脉冲,激活操作激活耦合到突触前LIF线的存取晶体管。存取晶体管使LIF电流能够通过电阻存储单元到达突触后LIF线。积分操作会随着时间对突触后LIF线上的LIF电流进行积分。比较操作将突触后LIF线上的LIF电压与阈值电压进行比较。如果LIF电压超过阈值电压,则生成操作会在突触后STDP线上生成突触后尖峰时序相关可塑性(STDP)脉冲。

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