首页> 外国专利> ENHANCEMENT-MODE GaN TRANSISTOR WITH SELECTIVE AND NONSELECTIVE ETCH LAYERS FOR IMPROVED UNIFORMITY IN GaN SPACER THICKNESS

ENHANCEMENT-MODE GaN TRANSISTOR WITH SELECTIVE AND NONSELECTIVE ETCH LAYERS FOR IMPROVED UNIFORMITY IN GaN SPACER THICKNESS

机译:具有选择性和非选择性刻蚀层的增强型GaN晶体管,可改善GaN间隔层厚度的均匀性

摘要

An enhancement-mode transistor gate structure which includes a spacer layer of GaN disposed above a barrier layer, a first layer of pGaN above the spacer layer, an etch stop layer of p-type Al-containing column III-V material, for example, pAlGaN or pAlInGaN, disposed above the first p-GaN layer, and a second p-GaN layer, having a greater thickness than the first p-GaN layer, disposed over the etch stop layer. Any variation across the wafer from etching the etch stop layer and the underlying thin pGaN layer is much less than the variation resulting from etching a thick pGaN layer. The method of the present invention thus leaves a thin layer of GaN above the barrier layer with minimal variation across the wafer.
机译:增强模式晶体管栅极结构,其包括例如设置在势垒层上方的GaN隔离层,在该隔离层上方的pGaN的第一层,p型含Al列III-V材料的蚀刻停止层,设置在第一p-GaN层上方的pAlGaN或pAlInGaN,以及设置在蚀刻停止层上方的第二p-GaN层,其厚度大于第一p-GaN层。由于蚀刻停止层和下面的薄pGaN层而引起的整个晶圆上的任何变化都比蚀刻厚pGaN层所产生的变化小得多。因此,本发明的方法在势垒层上方留下了GaN薄层,整个晶片上的变化最小。

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