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Method for Manufacturing a Single-Electron Logic Device operating at Room Temperature

机译:在室温下工作的单电子逻辑器件的制造方法

摘要

A single-electron logic device operating in room temperature and a method of manufacture thereof are provided to suppress the influence for the operation of the single-electron transistor. The oxide film is deposited in the top of the substrate to form the base substrate. The substrate is selectively etched to define the nano wire framework region. The polysilicon layer(40) and oxide film(30) are successively deposited on the nano wire framework region. The oxide film and polysilicon layer are selectively etched to expose one part of the nano wire framework region. The source and drain are formed while the quantum dot is formed in the silicon layer of the exposed nano wire structure. The gate(70) is formed in the space between the drain and the source.
机译:提供一种在室温下操作的单电子逻辑器件及其制造方法,以抑制对单电子晶体管的操作的影响。氧化膜沉积在衬底的顶部以形成基础衬底。选择性地蚀刻衬底以限定纳米线框架区域。在纳米线框架区域上依次沉积多晶硅层(40)和氧化膜(30)。选择性地蚀刻氧化物膜和多晶硅层以暴露纳米线框架区域的一部分。在暴露的纳米线结构的硅层中形成量子点的同时形成源极和漏极。栅极(70)形成在漏极和源极之间的空间中。

著录项

  • 公开/公告号KR100949038B1

    专利类型

  • 公开/公告日2010-03-24

    原文格式PDF

  • 申请/专利权人

    申请/专利号KR20070093434

  • 发明设计人 최중범;김상진;이창근;박은실;

    申请日2007-09-14

  • 分类号H01L21/334;H01L29/775;

  • 国家 KR

  • 入库时间 2022-08-21 18:31:24

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