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Multiplying circuit used in the multiplication of the neurons in the internal and hierarchical neural network that is constructed using neuron, the neuron
Multiplying circuit used in the multiplication of the neurons in the internal and hierarchical neural network that is constructed using neuron, the neuron
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机译：在内部和分层神经网络中使用神经元（神经元）构造的神经元的乘法中使用的乘法电路
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摘要
There is provided a neuron which is capable of expressing an excitative coupling and a suppressive coupling by one signal by devising signals processed in the neuron to reduce a circuit area of a neural network in constructing the neural network by a digital electronic circuit. A multiplying block calculates a numerical value following a normal distribution N(wx, 1) by using a corresponding link weight w under the supposition that delay time of each pulse of an input signal follows a normal distribution of N(x, 1). Next, an adding block adds the numerical values calculated by the respective multiplying blocks one after another and a non-linear operating block counts a number of positive values within the added value obtained by the adding block. A pulse delaying block delays output pulse following a normal distribution in which delay time is 0 in average generated by a basic pulse generating block based on the result of operation of the non-linear operating block to output as an output signal.
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