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Method for placing active circuits beneath active bonding pads

机译:将有源电路置于有源焊盘下方的方法

摘要

The present invention provides a bonding pad structure for integrated circuit devices which allows the active circuits to be placed under bonding pads of the device without affecting the performance of the active circuits. The bonding pad structure is composed of at least two metal layers overlying the active circuits so that the bonding pad may be subjected to thermal and mechanical stresses without damaging the underlying active circuits. The metal layer underlying the bonding pad is patterned and etched forming an array of openings in the metal that may take any shape, e.g. slots, grid, circles. The present invention enables a reduction in the chip area and eliminates the parasitic resistance due to long interconnection wires between bonding pads and active regions.
机译:本发明提供了一种用于集成电路器件的焊盘结构,该结构允许将有源电路放置在该器件的焊盘下方,而不会影响有源电路的性能。接合垫结构由覆盖有源电路的至少两个金属层组成,使得接合垫可以经受热和机械应力而不会损坏下面的有源电路。对焊盘下方的金属层进行图案化和蚀刻,从而在金属中形成开口阵列,该开口阵列可以采用任何形状,例如,矩形。插槽,网格,圆圈。本发明使得能够减小芯片面积并且消除了由于焊盘和有源区之间的长互连线而引起的寄生电阻。

著录项

  • 公开/公告号US6734093B1

    专利类型

  • 公开/公告日2004-05-11

    原文格式PDF

  • 申请/专利权人 INTEL CORPORATION;

    申请/专利号US19990271615

  • 申请日1999-03-17

  • 分类号H01L214/40;H01L234/80;H01L235/20;H01L294/00;

  • 国家 US

  • 入库时间 2022-08-21 23:17:52

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