ACHIEVING LOW JUNCTION CAPACITANCE ON BULK SI MOSFET USING SDOI PROCESS

机译：使用SDOI工艺在BULK SI MOSFET上实现低结电容

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We demonstrated a new process, SDOI, to achieve extremely low junction capacitance on bulk Silicon MOSFET. SDOI stands for Source Drain On Insulator. It allows the source and drain region of a MOSFET to stay over an oxide layer while the channel region remains on bulk Silicon. The junction capacitance reduction resulted in 18% improvement in ring oscillator speed on 0.13um transistors. The DC characteristics of SDOI MOSFET matches closely to that of bulk Silicon MOSFET. Unlike SOI MOSFET, SDOI MOSFET has no floating body effect. It does not require special device models and can be easily integrated with other bulk Silicon devices, such as diodes and bipolar transistors. We also investigated process factors that affect the yield and performance of SDOI MOSFET.

机译：我们展示了一种新工艺SDOI，可在体硅MOSFET上实现极低的结电容。 SDOI代表绝缘体上的源漏。它允许MOSFET的源极和漏极区域停留在氧化层上方，而沟道区域保留在体硅上。结电容的减小导致0.13um晶体管的环形振荡器速度提高了18％。 SDOI MOSFET的直流特性与体硅MOSFET的直流特性非常匹配。与SOI MOSFET不同，SDOI MOSFET没有浮体效应。它不需要特殊的器件模型，并且可以轻松地与其他大容量硅器件集成在一起，例如二极管和双极晶体管。我们还研究了影响SDOI MOSFET成品率和性能的工艺因素。

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来源
《Electrochemical Society Meeting and International Symposium on ULSI Process Integration III; 20030428-20030502; Paris; FR》|2003年|P.266-277|共12页
会议地点 Paris(FR);Paris(FR)
作者
Zhongze Wang; Todd Abbott; Jigish Trivedi; Chih-Chen Cho; Mike Violette;
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作者单位

Micron Technology Inc. 8000 S. Federal way, P.O. Box 6 Boise, Idaho 83707-0006, USA;

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原文格式 PDF
正文语种 eng
中图分类大规模集成电路、超大规模集成电路;
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ACHIEVING LOW JUNCTION CAPACITANCE ON BULK SI MOSFET USING SDOI PROCESS

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