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Supporting early development of advanced high-performance logic withsynchrotron orbital radiation lithography: a feasibility evaluation,

机译：通过同步加速器轨道辐射光刻技术支持早期高性能逻辑的早期开发：可行性评估，

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Abstract: The synchrotron x ray lithography (XRL) project described was conducted as a learning and feasibility vehicle for gate level lithography in support of IBM's most advanced CMOS logic programs. An electrically probable multilevel lithography test site was developed and characterized to exercise critical design, mask manufacture, alignment, exposure, and metrology issues in the 150 - 350 nm linewidth range. A fully capped silicided polysilicon gate stack was chosen for the electrical measurements in order to develop and demonstrate the XRL and related reactive ion etch process on a realistic, product-like substrate. This paper addresses test site design issues, elaborates on the mask manufacturing process, and presents SEM and electrical data from wafers processed at IBM's Advanced Semiconductor Technology Center. The data presented demonstrate the feasibility of supporting early device development and process integration with XRL and highlight the need for high resolution, defect free, proximity corrected masks to fully exploit the capabilities of x ray lithography. !3
机译：摘要：所描述的同步加速器X射线光刻（XRL）项目是作为门级光刻的学习和可行性工具而进行的，以支持IBM最先进的CMOS逻辑程序。开发了一个电学上可能的多层光刻测试站点，并对其进行了表征，以执行150-350 nm线宽范围内的关键设计，掩模制造，对准，曝光和计量问题。选择完全覆盖的硅化多晶硅栅极叠层进行电测量，以便开发和演示XRL和相关的反应离子刻蚀工艺，该工艺在真实的，类似产品的基板上进行。本文解决了测试现场的设计问题，详细介绍了掩模的制造工艺，并介绍了在IBM先进半导体技术中心处理过的晶圆的SEM和电学数据。所提供的数据证明了支持早期设备开发和与XRL进行工艺集成的可行性，并强调了需要高分辨率，无缺陷，经过接近校正的掩模以充分利用X射线光刻的功能。 ！3

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