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HVIC Process on Bonded Wafers with Internal Gettering

机译:具有内部吸气功能的键合晶片的HVIC工艺

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摘要

A high voltage BiCDMOS process, using bonded and trench isolated wafers, was developed for internal use and foundry opportunities. Extensive use was made of the oxide isolation to achieve electrical isolation of >1000V between elements. The Oxide isolation also allows high packing density, positive and negative voltages on the same chip, noise reduction and allows devices which inject minority carriers into the substrate. This process supports a rugged, vertical 350V DMOS, 10V CMOS, vertical NPN, lateral PNP, and a 450V SCR, together with a variety of components such as resistors, high and low voltage capacitors, Zener diodes, etc. We propose for the first time, the use of internal gettering in combination with high temperature denuding of the active layer using thermal oxidation techniques to achieve high minority carrier lifetime and enhanced gate oxide integrity (GOI). The internal gettering was achieved by the use of a pre-bond implantation and resulted in significantly enhanced minority carrier lifetime of the SOI layer.
机译:开发了一种使用粘合和沟槽隔离晶片的高压BiCDMOS工艺,以供内部使用和铸造机会。广泛使用氧化物隔离以实现元件之间> 1000V的电隔离。氧化物隔离还允许高堆积密度,同一芯片上的正负电压,降低噪声并允许将少数载流子注入衬底的器件。该工艺支持坚固耐用的垂直350V DMOS,10V CMOS,垂直NPN,横向PNP和450V SCR,以及各种组件,例如电阻器,高低压电容器,齐纳二极管等。现在,内部吸杂结合使用热氧化技术对活性层进行高温剥蚀来实现较高的少数载流子寿命和增强的栅极氧化物完整性(GOI)。内部吸杂是通过使用预键合注入实现的,从而显着提高了SOI层的少数载流子寿命。

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