Junction anneal sequence optimization for advanced high-k / metal gate CMOS technology

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• 来源
  《Junction Technology, 2009. IWJT 2009》|2009年|54-57|共4页
• 会议地点 Kyoto(JP);Kyoto(JP)
• 作者

  Ortolland C.; Ragnarsson L.-A.; Kerner C.; Chiarella T.; Rosseel E.; Okuno Y.; Favia P.; Richard O.; Everaert J.-L.; Schram T.; Kubicek S.; Absil P.P.; Biesemans S.; Schreutelkamp R.; Hoffmann T.;

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• 作者单位

  IMEC, Leuven, Belgium;

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• 会议组织
• 原文格式 PDF
• 正文语种
• 中图分类
• 关键词

  CMOS integrated circuits; high-k dielectric thin films; laser beam annealing; La-based capping; NMOS; PMOS; advanced high-k CMOS technology; eWF modulation penalty; high-k capping film; junction anneal sequence optimization; laser spike annealing; metal gate CMOS technology;

  机译：CMOS集成电路;高k介电薄膜;激光束退火; La基覆盖; NMOS; PMOS;先进的高k CMOS技术; eWF调制惩罚;高k覆盖膜;结退火序列优化;激光尖峰退火;金属栅CMOS技术;