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首页> 外文会议>Annual SEMI Advanced Semiconductor Manufacturing Conference >Backside and edge cleaning of III–V on Si wafers for contamination free manufacturing
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Backside and edge cleaning of III–V on Si wafers for contamination free manufacturing

机译：硅晶片上III–V的背面和边缘清洁，可实现无污染制造

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摘要

III-V on Silicon epitaxial wafers are typically contaminated with residual III-V materials on the backside, bevel and front side exclusion zone. This contamination poses a risk for device manufacturing. The level of contamination can vary from trace to gross, depending on the epitaxial deposition process and method of backside wafer surface protection. Even when the backside surface is well protected and cleaned, trace amounts of III-V material including arsenic can still be detected. Wet clean methods usually use acid chemistries and if not optimized may involve significant chemical cost, safety risks, and contamination issues. Wafer backside and edge cleaning processes, employed to remove residual III-V material need to be designed for robust performance with a wide range of deposited materials and repeatable results in order to ensure contamination free manufacturing at subsequent steps of the fabrication flow.
机译：硅外延晶片上的III-V通常在背面，斜面和正面排除区上被残留的III-V材料污染。这种污染给设备制造带来了风险。根据外延沉积工艺和背面晶圆表面保护的方法，污染的程度可能从痕量到总含量不等。即使对背面进行了良好的保护和清洁，仍可以检测到痕量的III-V物质（包括砷）。湿法清洁方法通常使用酸性化学物质，如果未进行优化，则可能会涉及重大的化学成本，安全风险和污染问题。需要设计用于去除残留III-V材料的晶圆背面和边缘清洁工艺，以具有广泛的沉积材料和可重复结果的鲁棒性能，以确保在制造流程的后续步骤中实现无污染的制造。

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