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Exploiting latency variation for access conflict reduction of NAND flash memory

机译：利用延迟变化来减少NAND闪存的访问冲突

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摘要

NAND flash memory has been widely used in storage systems by offering greater read/write performance and lower power consumption than mechanical hard drives. Recently, the tradeoff between endurance, write speed, and read speed has been exploited from many ways for I/O performance improvement, which also induce the read/write latency variation. In this paper, the latency variation is exploited in I/O scheduling for access characteristic guided read and write latency minimization. First, with the understanding of the relationship among read latency, write latency and raw bit error rates (RBER), different ways to exploit the relationship for read and write latency reduction is discussed. Then, an I/O scheduling scheme is proposed by using hotness and retention age of accessed data to determine the speed of writes or reads, giving scheduling priority to fast writes and fast reads for conflict reduction. Experiments with various traces reveal that the proposed technique achieves significant read and write performance improvements.
机译：与机械硬盘驱动器相比，NAND闪存具有更高的读取/写入性能和更低的功耗，已广泛用于存储系统中。最近，已通过多种方式在耐久性，写入速度和读取速度之间进行权衡，以改善I / O性能，这也引起了读取/写入延迟的变化。在本文中，在I / O调度中利用了等待时间变化，以使访问特性引导的读写等待时间最小化。首先，在了解了读取延迟，写入延迟和原始误码率（RBER）之间的关系之后，讨论了利用这种关系减少读取和写入延迟的不同方法。然后，提出了一种I / O调度方案，该方案通过使用访问数据的热度和保留期限来确定写入或读取的速度，从而将调度优先级分配给快速写入和快速读取以减少冲突。各种迹线的实验表明，所提出的技术实现了显着的读写性能改进。

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