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Design of a compact and low-power TDC for an array of SiPM's in 110nm CIS technology

机译:用于110nm CIS技术的SiPM阵列的紧凑型低功耗TDC设计

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Silicon photomultipliers (SiPMs) are meant to substitute photomultiplier tubes in high-energy physics detectors and nuclear medicine. This is because of their -to name a few interesting properties- compactness, lower bias voltage, tolerance to magnetic fields and finer spatial resolution. SiPMs can also be built in CMOS technology. This allows the incorporation of active quenching and recharge schemes at cell level and processing circuitry at pixel level. One of the elements that can lead to finer temporal resolutions is the time-to-digital converter (TDC). In this paper we describe the architecture of a compact TDC to be included at each pixel of an array of SiPMs. It is compact and consumes low power. It is based on a voltage controlled oscillator that generates multiple internal phases that are interpolated to provide time resolution below the time delay of a single gate. Simulation results of a 11b TDC based on a 4-stage VCRO in 110nm CIS technology yield a time resolution of 80.0ps, a DNL of ±0.28 LSB, a INL ±0.52 LSB, and a power consumption of 850μW.
机译:硅光电倍增管(SiPM)旨在替代高能物理探测器和核医学中的光电倍增管。这是因为它们(仅举几个有趣的特性)紧凑性,较低的偏置电压,对磁场的耐受性和更精细的空间分辨率。 SiPM也可以内置于CMOS技术中。这允许在单元级结合有源猝灭和充电方案,并在像素级结合处理电路。可以导致更高的时间分辨率的要素之一是时间数字转换器(TDC)。在本文中,我们描述了紧凑型TDC的体系结构,该体系结构将包含在SiPM阵列的每个像素中。它结构紧凑,功耗低。它基于一个压控振荡器,该振荡器产生多个内部相位,这些内部相位被内插以提供低于单个门的时间延迟的时间分辨率。基于110nm CIS技术的基于4级VCRO的11b TDC的仿真结果产生了80.0ps的时间分辨率,±0.28 LSB的DNL,±0.52 LSB的INL和850μW的功耗。

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