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A New Four-Side Abuttable ASIC for High-Resolution Multi-Energy CT Imaging Detector Arrays

机译:用于高分辨率多能量CT成像探测器阵列的新的四端邻接ASIC

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We have developed a new readout ASIC for multi-energy CT applications, which can be flip-chip bonded directly to a two-dimensional solid-state pixel detector. Its initial intended use is in CT breast imaging. This chip has an array of 80 × 96 readout channels with a pitch of 0.2 mm × 0.2 mm. The design uses through-silicon vias for the ASIC's power, bias and digital I/O connections to allow for a fully abuttable layout with a die size of 19.1 mm × 16.3 mm. Each channel has a charge-sensitive amplifier with individually adjustable parameters such as gain and baseline offset. The amplifiers are designed for count rates up to 1.25 ×10~8 photons per second per square millimeter (5×10~6 photons per second per pixel). The amplifier signals are discriminated by four comparators and counted in 12-bit pulse counters. The readout dead time is kept at negligible levels by copying each counter's data to its own dedicated readout register at the end of each count period, for readout during the following period. Reading the more than 30,000 registers can be accomplished in less than 0.5 ms, allowing for a frame rate of 2000 frames per second.
机译:我们开发了一种用于多能量CT应用的新读数ASIC,其可以直接倒装到二维固态像素检测器的倒装芯片。其初始预期用途是CT乳房成像。该芯片具有80×96读出通道的阵列,间距为0.2mm×0.2mm。该设计采用ASIC的电源,偏置和数字I / O连接的硅通孔,以允许完全抵耳的布局,芯片尺寸为19.1mm×16.3mm。每个通道具有充电敏感放大器,具有可单独调节的参数,例如增益和基线偏移。放大器设计用于每秒每平方毫米每秒最高1.25×10〜8光子的计数率(每像素每秒5×10〜6光子)。放大器信号由四个比较器歧视,并计数在12位脉冲计数器中。通过在每个计数周期结束时将每个计数器的数据复制到其自己的专用读数寄存器,读出死区时间可以忽略不计,在下一期间读出读出。读取超过30,000次寄存器,可以在小于0.5毫秒,允许每秒2000帧的帧速率。

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