Reliability degradation impact by ultra low-k dielectrics and improvement study for BEOL process beyond 28nm technology

机译：超低k电介质对可靠性退化的影响以及对BEOL工艺超过28nm技术的改进研究

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As CMOS is being scaled down to 28nm node and beyond, BEOL process must use ultra low-K film as inter-metal dielectric (IMD) layers to reduce interconnection RC delay. Compared to low-K film, ultra-low K film (K≤2.5) is more porous, softer and more hydrophilic intrinsically, and easy to be damaged by process plasma, film stress, thermal and aqueous environments. The paper focuses mainly on the BEOL processes, such as etch PET, metallization, CMP, thermal treatment impact of ultra low-k dielectrics on reliability performance of electromigration (EM) and time-dependent dielectric breakdown (TDDB) or dielectric voltage breakdown (VBD). Some optimized BEOL processes with improved control of damage on porous low k materials could lead to an acceptable EM and TDDB performance.

机译：随着CMOS的尺寸缩小到28nm及以上，BEOL工艺必须使用超低K膜作为金属间电介质（IMD）层，以减少互连RC延迟。与低K膜相比，超低K膜（K≤2.5）本质上具有更大的多孔性，柔软性和亲水性，并且容易受到工艺等离子体，膜应力，热和水性环境的损害。本文主要关注BEOL工艺，例如蚀刻PET，金属化，CMP，超低k电介质的热处理对电迁移（EM）和随时间变化的电介质击穿（TDDB）或电介质电压击穿（VBD）的可靠性能的影响）。某些优化的BEOL工艺可以更好地控制对多孔低k材料的破坏，可以实现可接受的EM和TDDB性能。

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《China Semiconductor Technology International Conference》|2015年|1-3|共3页
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Fanfei Bai; Xinghua Song;
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BEOL process; Reliability degradation; reliability improvement; ultra-low K film damage;

机译：BEOL工艺;可靠性降低;可靠性提高;超低K膜损坏;

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专利

1. Integration of gas cluster process for copper interconnects reliability improvement and process impact evaluation on BEOL dielectric materials [J] . R. Gras, L.G. Gosset, M. Hopstaken, Microelectronic Engineering . 2007,第9a10期

机译：集成气体簇工艺以实现铜互连的可靠性和对BEOL介电材料的工艺影响评估
2. Beol processing:Surface prep, cleaning, stripping of low-k dielectrics, copper interconnects become more problematic [J] . Micro . 2005,第4期

机译：Beol处理：表面准备，清洁，剥离低k电介质，铜互连变得更加成问题
3. Impact of patterning and ashing on electrical properties and reliability of interconnects in a porous SiOCH ultra low-k dielectric material [J] . M. Aimadeddine, V. Arnal, A. Farcy, Microelectronic Engineering . 2005,第3a4期

机译：图案化和灰化对多孔SiOCH超低k介电材料中电学性能和互连可靠性的影响
4. Reliability degradation impact by ultra low-k dielectrics and improvement study for BEOL process beyond 28nm technology [C] . Fanfei Bai, Xinghua Song China Semiconductor Technology International Conference . 2015

机译：超低k电介质和改进研究的可靠性降解影响BEOL工艺超过28nm技术
5. Mechanical reliability of porous low-k dielectrics for advanced interconnect: Study of the instability mechanisms in porous low-k dielectrics and their mediation through inert plasma induced re-polymerization of the backbone structure. [D] . Sa, Yoonki. 2015

机译：用于高级互连的多孔低k电介质的机械可靠性：多孔低k电介质的不稳定性机理及其通过惰性等离子体引发的骨架结构再聚合的介导研究。
6. Time Dependent Dielectric Breakdown in Copper Low-k Interconnects: Mechanisms and Reliability Models [O] . Terence K.S. Wong 2012

机译：铜低k互连中随时间变化的介电击穿：机理和可靠性模型
7. Correlation between stress-induced leakage current and dielectric degradation in ultra-porous SiOCH low-k materials [O] . Wu Chen, Li Yunlong, Lesniewska Alicja, 2015

机译：超孔SiOCH低k材料中应力引起的泄漏电流与介电性能的相关性

Reliability degradation impact by ultra low-k dielectrics and improvement study for BEOL process beyond 28nm technology

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