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Integration of gas cluster process for copper interconnects reliability improvement and process impact evaluation on BEOL dielectric materials

机译：集成气体簇工艺以实现铜互连的可靠性和对BEOL介电材料的工艺影响评估

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摘要

A new process, based on the interaction between Si and N rich gas cluster and post Cu CMP features surface, was integrated in a multi-level Cu interconnect stack using 65 nm design rules. Using the same integration scheme as stand-alone SiCN dielectric capping, excellent electrical properties were achieved when the process was implemented with a USG layer on top of a porous Ultra-Low K. Furthermore, 3x electromigration time to failure improvement was evidenced, making the approach very promising to address EM performance requirement for the most advanced technology nodes. Moreover, contrary to PE-CVD CuSiN approach, the process does not depend on Cu crystallographic orientation. Finally, when the implantation process is performed on un-capped ULK, a deep N contamination occurs. Therefore, the process must be optimized to preserve the interest of this technique for the most aggressive architectures.
机译：基于65 Si的设计规则，基于富含Si和N的气体簇与后Cu CMP特征表面之间相互作用的新工艺被集成到多层Cu互连堆栈中。使用与独立式SiCN介质封盖相同的集成方案，当在多孔Ultra-Low K上方的USG层上实施该工艺时，可获得出色的电性能。此外，证明了3倍的电迁移时间可以改善故障，从而使该方法非常有希望满足最先进技术节点的EM性能要求。此外，与PE-CVD CuSiN方法相反，该过程不取决于Cu晶体学取向。最后，当在未封盖的ULK上执行注入工艺时，会发生深N污染。因此，必须对过程进行优化，以保留最积极的体系结构对这种技术的兴趣。

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