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Experimental parametric study on the bumping and coining of gold studs for flip chip bonding

机译:用于倒装芯片接合的金钉凸点和压花的实验参数研究

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The effects of various parameters on the flip chip assembly with gold stud bumps are investigated. Silicon chips and submounts with Kelvin structures are fabricated as test vehicle. Gold stud bumping parameters are adjusted to obtain an optimal bump shape. The stud bump bonding strength is evaluated by ball shear tests. A thermosonic compression process, known as coining, is performed to reduce the height variation of the bumps. The coining parameters are studied and optimized. The ball shear strength of the coined bumps is evaluated. The chip bonding parameters are evaluated and optimized. The die shear strength and the electrical resistance after flip chip bonding are measured and discussed.
机译:研究了各种参数对带有金柱形凸块的倒装芯片组件的影响。具有开尔文(Kelvin)结构的硅芯片和基座被制造为测试工具。调整金钉凸点的凸度参数以获得最佳凸点形状。柱头凸点的结合强度通过球剪切试验评估。执行热超声压缩过程,称为精压,以减少凸块的高度变化。研究并优化了压印参数。评估了冲压凸块的球形剪切强度。评估并优化了芯片键合参数。测量并讨论了倒装芯片键合后的芯片剪切强度和电阻。

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