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首页> 外文会议>Conference on design and process integration for microelectronic manufacturing >Simulation based data processing using repeated pattern identification
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Simulation based data processing using repeated pattern identification

机译：基于模拟的数据处理使用重复模式识别

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In typical integrated circuits (IC) designs, the final layout generally contains a lot of repeated patterns. Many of these repetitions are captured by the layout hierarchy. That is, the layout contains many cells that are each repeatedly placed in many locations with different transformation. Effective use of such repetition information in the computation intensive operations such as model-based optical proximity correction (OPC), verification, or contour generation, can lead to significant performance improvement. However, in many other occasions, such repetition information is not directly available. For example, if the layout is flattened, then all the hierarchy that captures the repetition information is lost. Even in hierarchical layout, a cell can contain repeated geometries or patterns. In order for the application to take advantage of such property, a mechanism to efficiently capture such repetition information is necessary. In this paper, we consider the model-based applications that have a unique property, which allows us to find different geometrical patterns that are equivalent in principle for simulation purpose. We introduce a proximity-based pattern identification method which aims at recognizing the maximum amount of repetition in the layout. This method not only captures repeated or symmetric geometries that are present from either the flattening of the hierarchy or within a cell itself, but also finds symmetries within the geometries themselves. The method also finds partial repetitions of geometries that are not completely identical or symmetric. Ideally, these "equivalent" patterns will eventually carry the same processing results with miniscule variations small enough to be ignored for the application. For this reason, it is sufficient to run the computationally expensive model-based operations for one of the pattern and carry the result to the rest of the patterns of the same family. Doing so reduces the problem size as well as the amount of data that requires processing. The total processing tune therefore can be dramatically reduced. We demonstrate the method by using OPC as a test example. We show the level of problem size reduction and job run time reduction due to the specific nature of different layouts.
机译：在典型的集成电路（IC）设计中，最终布局通常包含很多重复模式。这些重复中的许多都被布局层次结构捕获。也就是说，布局包含许多细胞，每个小区在许多具有不同变换的位置中被重复放置。有效地利用这种重复信息在计算密集型操作中，例如模型的光学接近校正（OPC），验证或轮廓生成，可能导致显着的性能改进。但是，在许多其他场合中，这种重复信息不可直接可用。例如，如果布局展平，则丢失捕获重复信息的所有层次结构丢失。即使在分层布局中，电池也可以包含重复的几何形状或图案。为了使应用利用此类属性，需要有效地捕获这种重复信息的机制。在本文中，我们考虑具有唯一属性的基于模型的应用程序，它允许我们找到原则上的不同几何图案，以用于模拟目的。我们介绍了一种基于接近的模式识别方法，其旨在识别布局中的最大重复量。该方法不仅捕获从层次结构的扁平化或在细胞本身内部存在的重复或对称的几何形状，而且还在几何形状本身内找到对称性。该方法还发现了不完全相同或对称的几何形状的部分重复。理想情况下，这些“等效”模式最终将携带相同的处理结果，其微小的变型足够小以忽略应用程序。因此，对于其中一个模式运行基于计算昂贵的基于模型的操作就足够了，并将结果携带到同一系列的其余模式。这样做会降低问题大小以及需要处理的数据量。因此，可以大大减少总处理曲调。我们通过使用OPC作为测试示例来展示该方法。由于不同布局的特定性质，我们显示出问题大小减小和作业运行时间的水平。

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