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首页> 外文会议>International Symposium on High Dielectric Constant and Other Dielectric Materials for Nanoelectronics and Photonice >Gate Stack Technologies for SiC Power MOSFETs
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Gate Stack Technologies for SiC Power MOSFETs

机译：SIC POWER MOSFET的门堆栈技术

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Silicon carbide has gained considerable attention for future power electronics. However, it's well known that SiC-based MOS devices have suffered from degraded electrical properties of thermally grown SiO_2/SiC interfaces, such as low inversion carrier mobility and deteriorated gate oxide reliability. This paper overviews the fundamental aspects of SiC-MOS devices and indicates intrinsic obstacles connected with an accumulation of both negative fixed charges and interface defects and with a small conduction band offset of the SiO_2/SiC interface which leading to the increased gate leakage current of MOS devices. To overcome these problems, we proposed using aluminum oxynitride (AlON) insulators stacked on thin SiO_2 underlayers for SiC-MOS devices. Superior flatband voltage stability of AlON/SiO_2/SiC gate stacks was achieved by optimizing the thickness of the underlayer and nitrogen concentration in the high-k dielectrics. Moreover, we demonstrated reduced gate leakage current and improved current drivability of SiC-MOSFETs with AlON/SiO_2 gate stacks.
机译：碳化硅对未来的电力电子产品有相当大的关注。然而，众所周知，基于SiC的MOS装置遭受了热生长的SiO_2 / SiC界面的降低的电性能，例如低反转载流子迁移率和栅极氧化物可靠性劣化。本文概述了SIC-MOS器件的基本方面，并表示固有固定电荷和界面缺陷的积累和SiO_2 / SIC接口的小导电带偏移连接的内在障碍物，这导致MOS的增加的栅极漏电流增加设备。为了克服这些问题，我们用氧互氧化铝（ALON）绝缘体提出，堆叠在SIC-MOS装置的薄SiO_2底层上。通过优化高k电介质中的底层和氮浓度的厚度来实现Alon / SiO_2 / SiC栅极堆叠的卓越的平带电压稳定性。此外，我们证明了具有ALON / SIO_2栅极堆叠的SiC-MOSFET的栅极漏电流降低和改善了SiC-MOSFET的电流驱动性。

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