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首页> 外文会议>Metrology, Inspection, and Process Control for Microlithography XX pt.2 >65 nm Photolithography Process Window Qualification Study with Advanced e-beam Metrology and Inspection Systems
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65 nm Photolithography Process Window Qualification Study with Advanced e-beam Metrology and Inspection Systems

机译：使用先进的电子束计量和检测系统进行65 nm光刻工艺窗口鉴定研究

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摘要

Focus exposure matrix (FEM) using contact mask is applied to two 65-nm production wafers. One wafer is dropped at after etch inspection (AEI) while another one is stopped after tungsten chemical mechanical polishing (WCMP). Gray level value (GLV) and critical dimension (CD) are measured using eProfile® at different hole patterns, such as dense, isolate, and static random access memory (SRAM) array of the contact AEI wafer. All results show very reasonable CD variation trends in focus exposure PWQ chart. Defect inspections using eScan®300 is performed on WCMP wafer at SRAM array area. The major defects detected are missing, bridging and dark voltage contrast (DVC) which is caused by open or partial open of the contact hole. We found that open defect is mainly sensitive to exposure energy. The higher the exposure energy, the fewer the DVC defects. The GLV map of oval tungsten plug (W-plug) correlates with GLV map of oval contact and DVC defect map very well.
机译：使用接触掩模的聚焦曝光矩阵（FEM）应用于两个65纳米生产晶圆。在蚀刻检查（AEI）之后，一个晶片会掉落，而钨化学机械抛光（WCMP）之后，另一个晶片会停下来。使用eProfile®在不同的孔图案（例如接触AEI晶片的密集，隔离和静态随机存取存储器（SRAM）阵列）上测量灰度值（GLV）和临界尺寸（CD）。所有结果在焦点曝光PWQ图表中显示出非常合理的CD变化趋势。使用eScan®300对WCMP晶圆的SRAM阵列区域进行缺陷检查。检测到的主要缺陷是缺失，桥接和暗电压对比度（DVC），这是由于接触孔的开口或部分开口而引起的。我们发现开放缺陷主要对曝光能量敏感。曝光能量越高，DVC缺陷越少。椭圆形钨塞（W-plug）的GLV图与椭圆形接触的GLV图和DVC缺陷图非常相关。

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