Analog Performance of SOI nFinFETs with Different TiN Gate Electrode Thickness

机译：TiN栅电极厚度不同的SOI nFinFET的模拟性能

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Multiple gate structures (MuGFETs) are known to be one of the most promising alternative in order to increase the transistor performance for sub 22nm technology node (1). The higher electrostatic channel control due to the presence of more than one gate results in a better short-channel effect.

机译：为了提高22nm以下技术节点（1）的晶体管性能，多栅极结构（MuGFET）是最有前途的替代方法之一。由于存在多个闸门，因此较高的静电通道控制会产生更好的短通道效应。

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来源
《Microelectronics technology and devices - SBMicro 2010》|2010年|p.59-65|共7页
会议地点 Sao Paulo(BR);Sao Paulo(BR)
作者
M. Galeti; M. Rodrigues; N. Collaert; E. Simoen; C. Claeys; et al;
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作者单位

University of Sao Paulo - LSI/PSI/USP Av. Prof. Luciano Gualberto, 158 trav.3 - CEP 05508-900 Sao Paulo, Brazil;

University of Sao Paulo - LSI/PSI/USP Av. Prof. Luciano Gualberto, 158 trav.3 - CEP 05508-900 Sao Paulo, Brazil;

imec, Kapeldreef 75, B-3001 Leuven, Belgium;

imec, Kapeldreef 75, B-3001 Leuven, Belgium;

imec, Kapeldreef 75, B-3001 Leuven, Belgium,rnE.E. Dept., KU Leuven, Kasteelpark Arenberg 10, B-3001 Leuven, Belgium;

et al;

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正文语种 eng
中图分类半导体技术;
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机译：TiN / SiON和TiN / HfO_2栅堆叠三栅SOI nFinFET中的栅诱导浮体效应
2. Analog Performance Of Standard And Strained Triple-gate Silicon-on-insulator Nfinfets [J] . Marcelo Antonio Pavanello, Joao Antonio Martino, Eddy Simoen, Solid-State Electronics . 2008,第12期

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3. Progressive Degradation Of Tin/sion And Tin/hfo_2 Gate Stack Triple Gate Soi Nfinfets Subjected To Electrical Stress [J] . J. M. Rafi, E. Simoen, A. Mercha, Journal of Vacuum Science & Technology. B, Microelectronics and Nanometer Structures . 2009,第1期

机译：电应力作用下Tin / sion和Tin / hfo_2门叠层三门Soi Nfinfets的逐步降解
4. Analog Performance of SOI nFinFETs with Different TiN Gate Electrode Thickness [C] . M. Galeti, M. Rodrigues, N. Collaert, Symposium on microelectronics technology and devices . 2010

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Analog Performance of SOI nFinFETs with Different TiN Gate Electrode Thickness

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