Abstract: Antireflective coatings (ARCs) have been used to enhance IC lithography for years, however, many conventional bottom ARCs can no longer maintain acceptable linewidth control, cannot meet stringent deep-UV (DUV) photoresist processing requirements, and increase the etch complexity. In this paper, we report the development of an inorganic ARC for DUV lithography in sub-0.25 micrometer advanced device applications. Plasma-enhanced chemical vapor deposition (PECVD) is employed to deposit a dielectric film silicon oxynitride (Si$-x$/O$-y$/N$-z$/) with specific optical properties. The three optical parameters of the Si$-x$/O$- y$/N$-z$/ film: refractive index n, extinction coefficient k, and thickness d are specifically designed to ensure that the reflection light that passes through the ARC/substrate is equal in amplitude and opposite in phase to the reflected light from the resist/ARC interface. The reflection light is canceled by destructive interference and therefore photoresist receives the minimum substrate reflection wave. Using this technique, we have successfully patterned features at 0.25 micrometer and below. The dielectric film can not only function as an ARC layer, but also serve as a hardmask for the pattern transfer etch process. With an aggressive etch bias process, linewidths down to 0.60 micrometer poly-Si gate are achieved with good linewidth control (3$sigma less than 12 nm) and a near perfect linearity. For the marginal metal etch resistance of DUV photoresist, the designed Si$-x$/O$-y$/N$- z$/ is effective in imparting more etch resistance and suppressing metal substrate reflection. Excellent optical uniformity of the n, k and thickness d of the Si$-x$/O$-y$/N$- z$/ ARC is obtained with a manufacturable PECVD deposition process. !8
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机译：摘要：抗反射涂层（ARC）多年来一直用于增强IC光刻性能，但是，许多传统的底部ARC无法再保持可接受的线宽控制，无法满足严格的深紫外线（DUV）光致抗蚀剂加工要求，并增加了蚀刻复杂性。在本文中，我们报告了用于0.25微米以下先进设备的DUV光刻的无机ARC的开发。等离子体增强化学气相沉积（PECVD）用于沉积具有特定光学特性的介电膜氮氧化硅（Si $ -x $ / O $ -y $ / N $ -z $ /）。 Si $ -x $ / O $ -y $ / N $ -z $ /膜的三个光学参数：折射率n，消光系数k和厚度d是专门设计的，以确保穿过反射膜的反射光。 ARC /基板与来自抗蚀剂/ ARC界面的反射光的振幅相等，并且相位相反。反射光被相消干涉所抵消，因此光致抗蚀剂接收到最小的基板反射波。使用此技术，我们已经成功地在0.25微米及以下的尺寸上构图了特征。介电膜不仅可以用作ARC层，而且可以用作图案转移蚀刻工艺的硬掩模。通过积极的蚀刻偏置工艺，可实现良好的线宽控制（小于12 nm的3σ）和近乎完美的线性度，可实现低至0.60微米的多晶硅栅线宽。对于DUV光致抗蚀剂的边缘金属抗蚀刻性，设计的Si $ -x $ / O $ -y $ / N $ -z $ /有效地赋予了更高的抗蚀刻性并抑制了金属基板的反射。通过可制造的PECVD沉积工艺，Si $ -x $ / O $ -y $ / N $ -z $ / ARC的n，k和厚度d具有极好的光学均匀性。 ！8
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