Integration of Lithography and Etch Simulations

机译：光刻与蚀刻模拟的集成

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In this work we report on predictions of final gate critical dimensions using lithography and plasma etch simulators integrated with a statistical simulator.

机译：在这项工作中，我们使用与统计模拟器集成的光刻和等离子蚀刻模拟器报告最终栅极临界尺寸的预测。

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来源
《Simulation of semiconductor processes and devices 1998(SISPAD98)》|1998年|8-11|共4页
会议地点 Leuven(BE);Leuven(BE)
作者
Z. Krivokapic; W.D. Heavlin; D.S. Bang;
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Advanced Micro Devices P.O. Box 3453, MS 117, Sunnyvale, CA 94088, USA;

Advanced Micro Devices P.O. Box 3453, MS 117, Sunnyvale, CA 94088, USA;

Advanced Micro Devices P.O. Box 3453, MS 117, Sunnyvale, CA 94088, USA;

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原文格式 PDF
正文语种 eng
中图分类半导体器件制造工艺及设备;
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1. 56 nm pitch Cu dual-damascene interconnects with self-aligned via using negative-tone development Lithography-Etch-Lithography-Etch patterning scheme [J] . Yannick Loquet, Yann Mignot, Christopher Waskiewicz, Microelectronic Engineering . 2013,第jula期

机译：通过使用负性显影光刻和蚀刻光刻图案，实现具有自对准的56 nm节距的铜双大马士革互连
2. DEEP ETCH X-RAY LITHOGRAPHY USING SILICON-GOLD MASKS FABRICATED BY DEEP ETCH UV LITHOGRAPHY AND ELECTROFORMING [J] . Ballandras S., Basrour S., Robert L., Journal of Micromechanics and Microengineering . 1995,第3期

机译：深硅X-射线光刻技术，采用深金UV光刻技术和电铸技术制造的硅金面膜
3. Impact of hard mask on reflectivity for litho-etch-litho-etch process in double patterning lithography [J] . Kuo H.-F., Chen Y.-T., Chen Y.-Y., Journal of computational and theoretical nanoscience . 2013,第3期

机译：硬掩模对双图案光刻中光刻-平版蚀刻工艺反射率的影响
4. Integration of Lithography and Etch Simulation [C] . Z. Krivokapic, W. D. Heavlin, D. S. Bang International conference on simulation of semiconductor devices and processes . 1998

机译：集成光刻和蚀刻模拟
5. Mechanisms and development of etch resistance for highly aromatic monomolecular etch masks: Towards molecular lithography. [D] . Jarvholm, Erik Jonas. 2007

机译：高度芳族单分子蚀刻掩模的抗蚀刻性机理和发展：迈向分子光刻。
6. Highly Aligned Polymeric Nanowire Etch-Mask Lithography Enabling the Integration of Graphene Nanoribbon Transistors [O] . Sangheon Jeon, Pyunghwa Han, Jeonghwa Jeong, 2021

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Integration of Lithography and Etch Simulations

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