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SPUTTERED SILICON FOR INTEGRATED MEMS APPLICATIONS

机译：适用于集成MEMS应用的溅射硅

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This paper describes a new fabrication process for creatingrnelectrostatic microstructures that are compatible withrnprefabricated aluminum-metallized CMOS circuitry. The processrnuses sputtered silicon to make released microstructures similarrnto those commonly made using LPCVD polysilicon but does sornat much lower temperatures (-350 “C). The low-temperaturernnature of sputter deposition makes it possible to use polyimidernsacrificial layers that can be released in an oxygen plasma. Thisrndry-release process eliminates the need for critical point dryingrnor similar methods. Average strain gradients in releasedrnsputtered silicon cantilevers were found to vary with the inversernsquare of thickness. At a thickness of 5.0 pm, the radius ofrncurvature of released cantilevers was in excess of 80 mm.rnImprovements in the electrical conductivity of completedrnstructures were realized by cladding the sputtered siliconrnstructural layers in symmetric, 50 nm thick layers of titaniumtungsten.rnUnderlying CMOS transistors showed no more than arn3% increase in their maximum saturation current afterrnmechanical layer processing. As a demonstration of thernintegratibility of the sputtered silicon process, electrostaticallyrnactuated variable-capacitors were fabricated above CMOSrncapacitance detection circuitry.
机译：本文介绍了一种新的制造工艺，该工艺可用于制造与预制的铝金属CMOS电路兼容的静电微结构。该工艺使用溅射的硅来制作释放的微结构，类似于使用LPCVD多晶硅通常制造的微结构，但是会在更低的温度（-350℃）下进行浸泡。溅射沉积的低温特性使得可以使用可以在氧等离子体中释放的聚酰亚胺牺牲层。这种干燥释放过程消除了关键点干燥或类似方法的需要。发现释放的溅射硅悬臂中的平均应变梯度随厚度的平方反比而变化。在厚度为5.0 pm时，释放的悬臂的曲率半径超过80毫米。-通过将溅射的硅结构层覆盖在对称的50 nm厚的钨钨层中，可以提高完成结构的电导率。底层CMOS晶体管未显示机械层处理后，其最大饱和电流增加了arn3％以上。为了证明溅射硅工艺的可集成性，在CMOS电容检测电路上方制造了静电驱动的可变电容器。

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