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A Scalable Systolic Array Architecture for 2-D Discrete Wavelet Transforms

机译：二维离散小波变换的可伸缩脉动阵列架构

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A systematic synthesis approach has been developed for scalable systolic array architecture for a 2-D Discrete Wavelet Transform(DWT) based on the data dependence analysis and linear index space transformation. The proposed architecture has regular topology, local routing, simple controller and high throughput rate. It can be easily extended to different parameters of various levels, macroblocks and filters. The derived architecture has been prototyped using Cadence Edge Framework.

机译：基于数据相关性分析和线性索引空间变换，针对二维离散小波变换（DWT）的可伸缩脉动阵列架构开发了系统的综合方法。所提出的体系结构具有规则的拓扑结构，本地路由，简单的控制器和高吞吐率。它可以轻松扩展到各种级别，宏块和滤波器的不同参数。派生的体系结构已使用Cadence Edge Framework进行了原型设计。

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来源
《VLSI signal processing, VIII》|1995年|303-312|共10页
会议地点 Sakai(JP)
作者
Jijun Chen; Magdy A. Bayoumi;
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作者单位

Center for Advanced Computer Studies University of Southwestern Louisiana Lafayette LA 70504;

Center for Advanced Computer Studies University of Southwestern Louisiana Lafayette LA 70504;

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会议组织
原文格式 PDF
正文语种 eng
中图分类微电子学、集成电路（IC）;通信理论;
关键词
image compression; wavelet transform; VLSI architecture;

机译：图像压缩小波变换VLSI架构;

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1. Efficient Systolic Array Architecture Design And Implementation For Discrete Wavelet Transform [J] . Lijun Sun Advances in electronic and electric engineering . 2018,第1期

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2. Efficient Systolic Array Architecture Design And Implementation For Discrete Wavelet Transform [J] . Selva Kumar R., Dharmishtan K. Varughese Advances in electronic and electric engineering . 2017,第1期

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3. Systolic array architectures for computation of the discrete wavelet transform [J] . Sung Bum Pan, Rae-Hong Park Journal of visual communication & image representation . 2003,第3期

机译：用于离散小波变换计算的脉动阵列架构
4. Systolic array based VLSI architecture for high throughput 2-D discrete wavelet transform [C] . Hongda Wang, Chiu-Sing Choy IEEE International Conference on Electron Devices and Solid-State Circuits . 2016

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5. Dynamically reconfigurable systolic array accelerators: A case study with extended Kalman filter and discrete wavelet transform algorithms [D] . Barnes, Robert C. 2009

机译：动态可重构脉动阵列加速器：扩展卡尔曼滤波器和离散小波变换算法的案例研究
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7. SYSTOLIC ARRAY ARCHITECTURES FOR DISCRETE WAVELET TRANSFORM: A SURVEY [O] . G. Nagendra Babu, Ganapathi Hegde, Pukh Raj Vaya 2014

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A Scalable Systolic Array Architecture for 2-D Discrete Wavelet Transforms

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