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Defect studies in 4H- Silicon Carbide PVT grown bulk crystals, CVD grown epilayers and devices.

机译：在4H-碳化硅PVT生长的块状晶体，CVD生长的外延层和器件中的缺陷研究。

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摘要

Silicon Carbide [SiC] which exists as more than 200 different polytypes is known for superior high temperature and high power applications in comparison to conventional semiconductor materials like Silicon and Germanium. The material finds plethora of applications in a diverse fields due to its unique properties like large energy bandgap, high thermal conductivity and high electric breakdown field. Though inundated with superior properties the potential of this material has not been utilized fully due to impeding factors such as defects especially the crystalline ones which limit their performance greatly. Lots of research has been going on for decades to reduce these defects and there has been subsequent improvement in the quality as the diameter of SiC commercial wafers has reached 150mm from 25mm since its inception.;The main focus of this thesis has been to study yield limiting defect structures in conjunction with several leading companies and national labs using advanced characterization tools especially the Synchrotron source. The in depth analysis of SiC has led to development of strategies to reduce or eliminate the density of defects by studying how the defects nucleate, replicate and interact in the material. The strategies discussed to reduce defects were proposed after careful deliberation and analysis of PVT grown bulk crystals and CVD grown epilayers. Following are some of the results of the study:;[1] Macrostep overgrowth mechanism in SiC was used to study the deflection of threading defects onto the basal plane resulting in stacking faults. Four types of stacking faults associated with deflection of c/c+a threading defects have been observed to be present in 76mm, 100mm and 150mm diameter wafers. The PVT grown bulk crystals and CVD grown epilayers in study were subjected to contrast studies using synchrotron white beam X-ray topography [SWBXT]. The SWBXT image contrast studies of these stacking faults with comparison of calculated phase shifts for postulated fault vectors by macrostep overgrowth of surface outcrops, has revealed faults to be of four types of which one of the following are discussed in detail which is the Shockley faults. The fault vector were determined by taking into account the contrast from stacking faults in SWBXT undergoing phase shift as the X-ray wave fields cross the fault plane. The deflected dislocations onto the basal plane were responsible for the stacking faults and were observed to be detrimental to the devices grown on them as they replicate to the epilayer. In the wafers studied at different stages of the SiC crystal boule resulted in reduction of threading defects as they at certain stage get deflected out of the crystal causing drop of defects density.;[2] A novel technique known as the Ray Tracing Simulation was used to determine the sense of c/c+a dislocations obtained via Grazing-Incidence X-ray Topography. Determination of the complete sense and burgers vector of these dislocations was very important to augment our proposed models on stacking faults associated with these defects. Orientation contrast mechanism in X- ray diffraction topography was previously determined to be the dominant factor in SiC by our group and the same principles were used for the simulation. The results were surmised after extensive comparison between experimental and simulation images for the c+2a defects.;[3] With the BPD density down to a record level of few hundred per square centimeter in several wafers in multiple regions made it possible to observe the conversion of sessile Threading Edge Dislocations [TED] to glissile BPDs with this repeating multiple times. Previously the high density of Basal Plane Dislocations [BPD] prevented from discerning the details accurately in the SiC images taken by SWBXT. The contribution of SWBXT in accurately categorizing the nature of dislocations in SiC has enabled the crystal growth community to incorporate strategies to mitigate their influence. One of them has been recognizing BPDs as deformation induced defects which have led to the development of strategies to reduce stress imperative for the motion of BPDs to levels below critical resolved shear stress. This in turn has provided an opportunity for last five years to resolve important defect interactions in the crystals with one of them being the operation of single-ended Frank Read source for the first time in SiC.;[4] Failure analysis of SiC bipolar devices using SWBXT and correlation with defect density has been studied to determine how the defect density affect breakdown voltage of high power junction diodes. It was observed that the screw dislocation density unlike in failure analysis studies performed previously did not affect the breakdown voltage for these Junction Barrier Schottky (JBS) rectifiers. The defects that were detrimental were the triangular defects, stacking faults and micropipes in bipolar devices observed on 4H-SiC patterned wafers.
机译：与200多种传统的半导体材料（如硅和锗）相比，存在200多种不同的多晶型的碳化硅[SiC]具有优越的高温和高功率应用。由于其独特的特性，例如大的能带隙，高的热导率和高的击穿电场，该材料在各个领域都有大量的应用。尽管被优越的性能所淹没，但由于诸如缺陷的阻碍因素，特别是结晶缺陷等阻碍其性能的因素，该材料的潜力尚未得到充分利用。为了减少这些缺陷，数十年来一直在进行大量的研究，随着质量的提高，SiC商用晶片的直径从25mm开始就达到了150mm，从而使质量得到了改善。；本论文的主要重点是研究成品率与一些领先的公司和国家实验室一起使用先进的表征工具（尤其是同步加速器源）限制缺陷结构。 SiC的深入分析已导致通过研究缺陷如何在材料中成核，复制和相互作用来减少或消除缺陷密度的策略的发展。在仔细研究和分析PVT生长的块状晶体和CVD生长的外延层之后，提出了减少缺陷的策略。以下是本研究的一些结果：[1]使用SiC中的宏步过度生长机制来研究螺纹缺陷在基面上的挠曲，从而导致堆垛层错。已经观察到与c / c + a螺纹缺陷的偏斜相关的四种类型的堆垛层错出现在直径为76mm，100mm和150mm的晶片中。使用同步加速器白光束X射线形貌[SWBXT]对研究中的PVT生长的块状晶体和CVD生长的外延层进行对比研究。 SWBXT图像对比研究了这些叠加层断层，并通过表面露头的宏步过度生长，对假定的断层矢量进行了相移计算，从而发现了该断层的四种类型，其中以下一种是肖克利断层。通过考虑X射线波场穿过断层平面时SWBXT中经历相移的堆叠断层的对比度确定故障矢量。偏斜到基底平面上的位错是造成堆垛层错的原因，当它们复制到外延层时，观察到它们对生长在其上的装置有害。在SiC晶体晶锭的不同阶段研究的晶片中，由于某些阶段的晶片偏离晶体而导致缺陷密度下降，从而减少了穿线缺陷。[2]使用一种称为射线追踪模拟的新技术确定通过掠入射X射线地形图获得的c / c + a错位的感觉。确定这些位错的完整方向和汉堡向量对于增强我们提出的与这些缺陷相关的堆垛层错模型非常重要。先前我们小组确定了X射线衍射形貌中的取向对比机制是SiC中的主要因素，并且使用相同的原理进行了模拟。在对c + 2a缺陷的实验图像和模拟图像进行了广泛比较之后，得出了可推测的结果。[3]随着BPD密度降低到创纪录的水平，在多个区域中的多个晶片中，每平方厘米几百个的水平使得观察BMP的可能成为可能。将无蒂螺纹边缘位错[TED]转换为易弯的BPD，并重复多次。以前，高密度的基底平面位错[BPD]不能准确分辨SWBXT拍摄的SiC图像中的细节。 SWBXT在准确分类SiC中位错的性质方面的贡献使晶体生长社区能够纳入减轻其影响的策略。其中之一是将BPD识别为变形引起的缺陷，从而导致开发了将BPD的运动所必需的应力降低到临界解析剪切应力以下的策略。反过来，这又提供了近五年来解决晶体中重要缺陷相互作用的机会，其中之一是首次在SiC中使用单端Frank Read源。[4] SiC双极器件的失效分析已经研究了使用SWBXT和缺陷密度的相关性来确定缺陷密度如何影响高功率结二极管的击穿电压。据观察，与先前进行的故障分析研究不同，螺钉的位错密度不会影响这些结型势垒肖特基（JBS）整流器的击穿电压。在4H-SiC图案化晶圆上观察到的有害缺陷是三角形缺陷，堆垛层错和双极器件中的微管。

著录项

  • 作者

    Byrappa, Shayan M.;

  • 作者单位

    State University of New York at Stony Brook.;

  • 授予单位 State University of New York at Stony Brook.;
  • 学科 Engineering Materials Science.
  • 学位 Ph.D.
  • 年度 2013
  • 页码 129 p.
  • 总页数 129
  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类
  • 关键词

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