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Atomic layer deposition of oxides for microelectronics.

机译：用于微电子学的氧化物的原子层沉积。

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摘要

Atomic layer deposition of high-kappa oxides has gained interest due to the wide applications in microelectronics. For gate dielectric application, amorphous oxides are preferred for the structural uniformity at nanometer scale. LaxM2-xO 3 (M = Sc, Lu or Y) films were deposited by ALD with metal amidinate precursors and H2O. Both LaScO3 and LaLuO3 films are amorphous and free of interfacial layers. Besides the structural benefits, both oxides have high dielectric constants (∼23 for LaScO 3 and 28 +/- 1 for LaLuO3), low leakage current density, and very few bulk traps, and are scalable to EOT 1 nm. La1.23Y 0.77O3 films have polycrystalline structures with moderately high kappa ∼ 17 and low leakage current. The Poole-Frenkel mechanism is verified in the ternary oxide films by studying temperature dependence of the leakage current. For La1.1Al0.9O3/Si, the thermal stability was evaluated by studying the interface structure evolution under different annealing conditions. It concludes that an interfacial layer forms at the temperature above 600°C and the oxygen source resides in the film.;For DRAM application, ALD deposition of rutile phase TiO2 is developed for its 70. The substrate, SnO2 and RuO2/Ru, works as both bottom electrodes and templates for rutile TiO2 nucleation. The growth rate is ∼ 0.3 A/cycle and is regardless of phases and crystallinity. The crystallinity strongly depends on the substrates.;High quality ruthenium thin films were deposited by ALD with bis( N,N'-di-tert-butylacetamidinato) ruthenium(II) dicarbonyl and O2. The film crystallinity, density, and resistivity strongly depend on the O2 exposure. As EO ≈ Emax, the films have the lowest resistivity, highest density and best crystallinity ( ∼10 muO·cm, ∼12.3 g/cm 3 and grain size comparable to film thickness). When E O > Emax, films peel off from the substrate due to the recombinative desorption of O2. The impurities are mainly O (0.27+/-0.03at.%) and C (0.30+/-0.05at.%). The C is mostly segregated along grain boundaries, which are less dense than the grain interiors.
机译：由于在微电子学中的广泛应用，高κ氧化物的原子层沉积引起了人们的兴趣。对于栅极电介质应用，非晶氧化物优选用于纳米级的结构均匀性。 LaxM2-xO 3（M = Sc，Lu或Y）膜通过ALD与金属with酸盐前体和H2O沉积。 LaScO3和LaLuO3膜都是非晶态的，没有界面层。除了结构上的好处外，两种氧化物均具有高介电常数（LaScO 3约为23，LaLuO3为28 +/- 1），低泄漏电流密度和极少的体陷阱，并且可扩展至EOT <1 nm。 La1.23Y 0.77O3薄膜具有多晶结构，具有适度的kappa〜17和低的漏电流。通过研究漏电流的温度依赖性，在三元氧化物膜中验证了Poole-Frenkel机理。对于La1.1Al0.9O3 / Si，通过研究不同退火条件下的界面结构演变来评估其热稳定性。结论是，在高于600°C的温度下会形成界面层，并且氧源存在于膜中。；对于DRAM应用，金红石相TiO2的ALD沉积是针对其70进行的。衬底SnO2和RuO2 / Ru起作用作为底部电极和金红石TiO2成核的模板。生长速率约为0.3 A /周期，与相和结晶度无关。结晶度在很大程度上取决于基底。高品质钌薄膜是通过ALD与二羰基双（N，N'-二叔丁基乙酰胺基）钌（II）和O2沉积而成的。膜的结晶度，密度和电阻率在很大程度上取决于氧气的暴露量。作为EO＆ap; Emax，薄膜具有最低的电阻率，最高的密度和最佳的结晶度（〜10μO·cm，〜12.3 g / cm 3，且晶粒尺寸与薄膜厚度相当）。当E O> Emax时，由于O2的重组解吸，薄膜将从基材上剥离。杂质主要是O（0.27 +/- 0.03at。％）和C（0.30 +/- 0.05at。％）。 C大部分沿晶界偏析，其密度比晶粒内部密度小。

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  • 作者

    Wang, Hongtao.;

  • 作者单位

    Harvard University.;

  • 授予单位 Harvard University.;
  • 学科 Physics Condensed Matter.
  • 学位 Ph.D.
  • 年度 2009
  • 页码 113 p.
  • 总页数 113
  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类 O49;
  • 关键词

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