基于0．18μm BCD工艺，设计了一种新颖的低温漂高电源抑制比（ PSRR）的带隙基准源电路。基准核心电路采用自偏置结构，简化了电路的设计。在不显著增加电路功耗与面积的前提下，通过引入预调节电路极大地提高了电路的PSRR。基准源输出采用负反馈结构，进一步提升了PSRR。 Hspice软件仿真结果表明：在－40～150℃温度范围变化时，基准输出电压变化为283μV，温度系数仅为1．18×10－6（ ppm）／℃；基准的稳定输出电压为1．257 V；电源电压在3～6 V范围变化时，线性调整率为0．082 mV／V；5 V电源电压下，低频时电源电压抑制比为130 dB，在100 kHz时也能高达65 dB。电路整体功耗为0．065 mW，版图面积为63μm ×72μm。%Based on 0.18 μm BCD process, a novel low temperature drift and high power supply rejection ( PSRR) bandgap reference source circuit was presented .The self-biased structure is adopted in reference core cir-cuit to simplify the design of the circuit .The pre-regulation circuit is introduced to improve the PSRR of the circuit significantly without increasing its power and area .The output of the reference source utilizes negative feedback structure which further improves the PSRR .Hspice simulation results show that the output voltage variation of bandgap reference is 283 μV and temperature coefficient is only 1.18 ×10 -6 ( ppm)/℃with temperature ranging from -40 ℃to 150℃.The stable output voltage of the reference is 1.257 V and its line regulation is 0.082 mV/V when supply voltage changes from 3 V to 6 V.The PSRR of the proposed reference is 130 dB at low frequency , and up to 65 dB at 100 kHz at 5 V supply voltage .The overall power consumption of the circuit is 0.065 mW.Cir-cuit layout area is 63 μm ×72 μm.
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