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首页> 外文期刊>American journal of applied sciences >Study the Characteristic of P-Type Junction-Less Side Gate Silicon Nanowire Transistor Fabricated by Atomic Force Microscopy Lithography
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Study the Characteristic of P-Type Junction-Less Side Gate Silicon Nanowire Transistor Fabricated by Atomic Force Microscopy Lithography

机译：原子力显微镜平版印刷技术研究P型无结侧栅硅纳米线晶体管的特性

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摘要

Problem statement: Nanotransistor now is one of the most promising fields in nanoelectronic in order to less energy consuming and application to create developed programmable information processors. Most of Computing and communications companies invest hundreds of millions of dollars in research funds every year to develop smaller transistors. Approach: The Junction-less side gate silicon Nano-wire transistor has been fabricated by Atomic Force Microscopy (AFM) and wet etching on p-type Silicon On Insulator (SOI) wafer. Then, we checked the characteristic and conductance trend in this device regarding to semi-classical approach by Semiconductor Probe Analyser (SPA). Results: We observe in characteristic of the device directly proportionality of the negative gate voltage and Source-Drain current. In semi classical approach, negative Gate voltage falling down the energy States of the Nano-wire between the source and the drain. The graph for positive gate voltage plotted as well to check. In other hand, the conductance will be following characteristic due to varying the gate voltage under the different drain-source voltage. Conclusion: The channel energy states are supposed to locate between two electrochemical potentials of the contacts in order to transform the charge. For the p-type channel the transform of the carriers is located in valence band and changing the positive or negative gate voltage, make the valence band energy states out of or in the area between the electrochemical potentials of the contacts causing the current reduced or increased.
机译：问题陈述：纳米晶体管现在是纳米电子领域最有前途的领域之一，以减少能源消耗并减少创建开发的可编程信息处理器的应用。多数计算和通信公司每年都会投资数亿美元的研究资金来开发更小的晶体管。方法：无结侧栅硅纳米线晶体管是通过原子力显微镜（AFM）和p型绝缘体上硅（SOI）晶片湿法刻蚀制成的。然后，我们通过半导体探针分析仪（SPA）检查了该器件关于半经典方法的特性和电导趋势。结果：我们在器件的特性中观察到负栅极电压与源极-漏极电流的比例成正比。在半经典方法中，负栅极电压会降低源极和漏极之间纳米线的能量状态。还要绘制正栅极电压的图表以进行检查。另一方面，由于在不同的漏极-源极电压下改变栅极电压，所以电导将遵循特性。结论：通道能态应该位于触点的两个电化学势之间，以转换电荷。对于p型沟道，载流子的变换位于价带中并改变正或负栅极电压，使价带能态超出或超出触点电化学势能之间的区域，从而导致电流减小或增大。

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  • 来源
    《American journal of applied sciences》 |2011年第9期|p.872-877|共6页
  • 作者

    Arash Dehzangi; Farhad Larki; E.B. Saion; Sabar D. Hatagalung; Makarimi Abdullah; M.N. Hamidon; Jumiah Hassan;

  • 作者单位

    Department of Physics, Faculty of Science, University Putra Malaysia,Serdang, Selangor, Malaysia, 43400 Serdang, Selangor, Malaysia;

    Department of Physics, Faculty of Science, University Putra Malaysia,Serdang, Selangor, Malaysia, 43400 Serdang, Selangor, Malaysia;

    Department of Physics, Faculty of Science, University Putra Malaysia,Serdang, Selangor, Malaysia, 43400 Serdang, Selangor, Malaysia;

    School of Materials and Mineral Resources Engineering,University Sains Malaysia, 14300 Nibong Tebal, Penang, Malaysia;

    Advanced Materials Research Centre, Sirim Berhad, Lot 34 Jalan Hi-Tech 2/3,Kulim Hi-Tech Park, 09000 Kulim, Kedah, Malaysia;

    Department of Electrical and Electric Engineering, Faculty of Engineering,University of Putra Malaysia, 43400 Serdang, Selangor, Malaysia;

    Department of Physics, Faculty of Science, University Putra Malaysia,Serdang, Selangor, Malaysia, 43400 Serdang, Selangor, Malaysia;

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  • 正文语种 eng
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  • 关键词

    silicon nanowire transistor (snwt); density of state (dos); electrochemical potential;

    机译：硅纳米线晶体管（snwt）;状态密度（dos）;电化学势;

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