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Various techniques, languages being used to verify system-on-a-chip designs

机译:各种技术,用于验证片上系统设计的语言

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摘要

The goal might be the same—to functionally verify system-on-a-chip (SOC) designs, but the paths taken to accomplish that goal can be quite different, as exemplified by recent advances in hardware verification and HW/SW co-verification and co-design tools. The threads in common are the need to automate, to raise to a higher level of abstraction, to build a verification-reuse methodology and to verify hardware and software together. The differences lie in the techniques and languages used to reach these objectives.
机译:目的可能是相同的-功能上验证片上系统(SOC)设计,但是实现该目标所采用的途径可能会大不相同,例如硬件验证和硬件/软件协同验证的最新进展就是例证和共同设计工具。共有的线程需要自动化,提升到更高的抽象水平,构建验证重用方法并一起验证硬件和软件。不同之处在于用于实现这些目标的技术和语言。

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