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首页> 外文期刊>Journal of Materials Science. Materials in Electronics >Surface roughness and interface engineering for gate dielectrics on strained layers
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Surface roughness and interface engineering for gate dielectrics on strained layers

机译：应变层上栅极电介质的表面粗糙度和界面工程

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摘要

The change in the morphology of various gate dielectrics (including deposited ZrO_(2) and TiO_(2)) on strained-Si on relaxed SiGe/Si and strained-SiGe layers is studied using an atomic force microscope (AFM). The AFM observation was carried out before and after oxidation. It has been found that the oxidation rate of strained-Si was affected by the existence of the cross-hatch related surface morphology. As a result, the surface roughness increases after oxidation. The roughness increase is more pronounced in a 26percent Ge-content samples than in a 9percent Ge-content sample. Transmission electron microscopy (TEM) has been used to identify the structure of the deposited layers and their interface with the strained-Si or SiGe substrates. Structural and electrical characterization results for deposited high-k gate dielectrics on strained-Si using Al/ZrO_(2)-Si and Al/TiO_(2)-Si metal-insulator-semiconductor (MIS) structures with equivalent oxide thickness (EOT) of 2.5 nm are presented. Effects of nitrogen incorporation on the electrical, interfacial, charge trapping and reliability properties of ultrathin oxide/oxynitride films grown using rapid thermal oxidation on strained-SiGe substrates are also discussed.
机译：使用原子力显微镜（AFM）研究了松弛SiGe / Si和应变SiGe层上应变硅上的各种栅极电介质（包括沉积的ZrO_（2）和TiO_（2））的形貌变化。在氧化之前和之后进行AFM观察。已经发现，应变硅的氧化速率受与交叉影线有关的表面形态的存在的影响。结果，氧化后表面粗糙度增加。 Ge含量为26％的样品比Ge含量为9％的样品更明显。透射电子显微镜（TEM）已用于确定沉积层的结构及其与应变Si或SiGe衬底的界面。使用等效氧化物Al / ZrO_（2）/ n-Si和Al / TiO_（2）/ n-Si金属-绝缘体-半导体（MIS）结构在应变硅上沉积高k栅极电介质的结构和电特性结果提出了2.5 nm的厚度（EOT）。还讨论了氮掺入对在应变SiGe衬底上快速热氧化生长的超薄氧化物/氮氧化物薄膜的电，界面，电荷俘获和可靠性的影响。

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