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首页> 外文期刊>IEEE Journal of Solid-State Circuits >Predicted propagation delay of Si/SiGe heterojunction bipolar ECL circuits
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Predicted propagation delay of Si/SiGe heterojunction bipolar ECL circuits

机译:Si / SiGe异质结双极ECL电路的预计传播延迟

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A comparison between the predicted propagation delays of ECL (emitter coupled logic) circuits composed of Si/SiGe heterojunction and silicon homojunction bipolar transistors is presented. Important transistor parameters such as the current gain, base transit time, base resistance, and emitter delay are calculated for the heterojunction transistor as a function of the Ge concentration in the SiGe base. This allows the important design tradeoffs for the heterojunction device to be identified. The calculations show that a Ge concentration of 12% is sufficient to allow the reversal of the usual emitter and base doping concentrations in a transistor with a base width of 0.02 mu m. The resulting transistor has a gain of <50 and an emitter delay of >1 ps. A quasi-analytical expression is used to calculate the propagation delay of 1- mu m ECL circuits incorporating the above transistor. A propagation delay of 15 ps is predicted for fully optimized Si/SiGe heterojunction circuits, compared with 29 ps for fully optimized silicon homojunction circuits. On scaling to geometries below 0.5 mu m, a propagation delay of 10 ps is predicted for Si/SiGe heterojunction circuits.
机译:提出了由Si / SiGe异质结和硅同质结双极晶体管组成的ECL(发射极耦合逻辑)电路的预测传播延迟的比较。根据SiGe基极中Ge的浓度,为异质结晶体管计算重要的晶体管参数,例如电流增益,基极渡越时间,基极电阻和发射极延迟。这允许识别异质结器件的重要设计折衷。计算表明,Ge浓度为12%足以使基极宽度为0.02μm的晶体管中的常规发射极和基极掺杂浓度反转。所得晶体管的增益<50,发射极延迟> 1 ps。准解析表达式用于计算结合了上述晶体管的1微米ECL电路的传播延迟。完全优化的Si / SiGe异质结电路的传播延迟预计为15 ps,而完全优化的硅同质结电路的传播延迟为29 ps。在将尺寸缩小到0.5μm以下时,Si / SiGe异质结电路的传播延迟预计为10 ps。

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