The Influence of Constructive Parameters on the Threshold Voltage of Nanodimensional p-Channel SOI MOS Transistors

B. K. Petrov; A. A. Krasnov

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The Influence of Constructive Parameters on the Threshold Voltage of Nanodimensional p-Channel SOI MOS Transistors

机译：构造参数对纳米p沟道SOI MOS晶体管阈值电压的影响

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摘要

The influence of the thickness of the silicon film and hole concentration in the p-channel nanodimensional MOS transistor based on the SOI structure is considered. The formulas for the computation of these dependences are derived and graphic dependences are presented.

机译：考虑了基于SOI结构的p沟道纳米MOS晶体管中硅膜厚度和空穴浓度的影响。推导了这些相关性的计算公式，并给出了图形相关性。

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《Russian Microelectronics》 |2012年第7期|共4页
作者
B. K. Petrov; A. A. Krasnov;
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正文语种 eng
中图分类微电子学、集成电路（IC）;
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1. The Influence of Constructive Parameters on the Threshold Voltage of Nanodimensional p-Channel SOI MOS Transistors [J] . B. K. Petrov, A. A. Krasnov Russian Microelectronics . 2012,第7期

机译：构造参数对纳米p沟道SOI MOS晶体管阈值电压的影响
2. Reversible and controllable threshold voltage modulation for n-channel MoS2 and p-channel MoTe2 field-effect transistors via multiple counter doping with ODTS/poly-L-lysine charge enhancers [J] . Seung Gi Seo, Jinheon Jeong, Seung Yeob Kim, 纳米研究（英文版） . 2021,第009期

机译：用于N沟道MOS2和P沟道MOTE2场效应晶体管的可逆和可控阈值电压调制通过多次计数器掺杂，具有渗透/聚-L-赖氨酸电荷增强剂
3. Threshold Voltage Tunability of p-Channel Metal Oxide Semiconductor Field-Effect Transistor with Ternary Hf_xMo_yN_z Metal Gate and Gd_2O_3 High-K Gate Dielectric [J] . Hsing-Kan Peng, Chao-Sung Lai, Jer-Chyi Wang Japanese journal of applied physics . 2010,第4issue2期

机译：具有三元Hf_xMo_yN_z金属栅极和Gd_2O_3高K栅极电介质的p沟道金属氧化物半导体场效应晶体管的阈值电压可调性
4. The influence of low-energy proton irradiaiton on threshold voltage and tranconductance of nanowire SOI n and p-channel transistors [C] . Fernando F. Teixeira, Paula G. D. Agopian, Sylvain Barraud, 2017 32nd Symposium on Microelectronics Technology and Devices . 2017

机译：低能质子辐照对纳米线SOI n和p沟道晶体管的阈值电压和跨导的影响
5. Strain effects on silicon CMOS transistors: Threshold voltage, gate tunneling current, and 1/f noise characteristics. [D] . Lim, Ji-Song. 2007

机译：应变对硅CMOS晶体管的影响：阈值电压，栅极隧穿电流和1 / f噪声特性。
6. Emulating synaptic response in n- and p-channel MoS2 transistors by utilizing charge trapping dynamics [O] . Shubhadeep Bhattacharjee, Rient Wigchering, Hugh G. Manning, -1

机译：通过利用电荷俘获动力学模拟n和p沟道MoS2晶体管中的突触响应
7. MODELING AND PSPICE SIMULATION OF RADIATION STRESS INFLUENCE ON THRESHOLD VOLTAGE SHIFTS IN P-CHANNEL POWER VDMOS TRANSISTORS [O] . Miloš Marjanović, Danijel Danković, Vojkan Davidović, 2016

机译：辐射应力影响对P沟道功率VDMOS晶体管阈值电压影响的建模与PSPICE模拟
8. Operation of SOI P-Channel Field Effect Transistors, CHT-PMOS30, under Extreme Temperatures [R] . Patterson, R., Hammoud, A. 2009

机译：在极端温度下操作sOI p沟道场效应晶体管CHT-pmOs30

The Influence of Constructive Parameters on the Threshold Voltage of Nanodimensional p-Channel SOI MOS Transistors

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