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首页> 外文期刊>Physica, C. Superconductivity and its applications >Analysis of capacitance in interface-engineered junctions based on an equivalent circuit model
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Analysis of capacitance in interface-engineered junctions based on an equivalent circuit model

机译:基于等效电路模型的界面工程结电容分析

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The capacitance, C, in interface-engineered junctions (IEJs) has been evaluated by comparing experimental hysteresis parameters (alpha (c)) with theoretical calculations based on an equivalent circuit model, in which the excess current incidental to Josephson junctions, made of high-temperature superconductors, is incorporated by a simple empirical formula. We have confirmed that the (alpha (c)) versus critical current (I-c) relationship observed for an IEJ, by varying the I-c value with an applied magnetic field, is reproduced well by the model. The analyses for a number of junctions have revealed that 1/C in IEJs scales approximately with log(I-c), reflecting a variation in the tunnel-barrier thickness among junctions. (C) 2001 Elsevier Science BY. All rights reserved. [References: 8]
机译:通过将实验迟滞参数(alpha(c))与基于等效电路模型的理论计算进行比较,对接口工程结(IEJ)中的电容C进行了评估,其中,约瑟夫森结附带的多余电流由高温度超导体通过简单的经验公式合并。我们已经确认,通过用施加的磁场改变I-c值,可以很好地再现IEJ的(α(c))与临界电流(I-c)的关系。对许多路口的分析表明,IEJ中的1 / C与log(I-c)近似成比例,反映了路口之间隧道势垒厚度的变化。 (C)2001 Elsevier Science BY。版权所有。 [参考:8]

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