Highly stable subthreshold single-ended 7T SRAM cell

著录项

• 来源
  《2014 2nd International Conference on Emerging Technology Trends in Electronics, Communication and Networking》|2014年|1-4|共4页
• 会议地点 Surat(IN)
• 作者

  Anand Nitin; Roy Chandaramauleshwar; Islam Aminul;

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• 作者单位

  Dept. of Electron. Commun. Eng., Birla Inst. of Technol., Ranchi, India;

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• 会议组织
• 原文格式 PDF
• 正文语种 eng
• 中图分类
• 关键词

  Monte Carlo methods; SRAM chips; integrated circuit design; integrated circuit noise; 6T SRAM cell; Monte-Carlo simulation; RSNM; SE-7T SRAM cell; highly stable subthreshold single-ended 7T SRAM cell; read access time; read static noise margin; voltage 350 mV; write access time; Circuit stability; Computer architecture; Microprocessors; Noise; SRAM cells; Transistors; CMOS; Hold Power; Read Delay; Read SNM; Write Delay;

  机译：蒙特卡罗方法; SRAM芯片;集成电路设计;集成电路噪声; 6T SRAM单元; Monte-Carlo仿真; RSNM; SE-7T SRAM单元;高度稳定的亚阈值单端7T SRAM单元;读取访问时间;读取静态噪声容限；电压350 mV；写入访问时间；电路稳定性；计算机体系结构；微处理器；噪声； SRAM单元；晶体管； CMOS；保持功率；读取延迟；读取SNM；写入延迟；;